d-iii-s / msim

Light-weight MIPS R4000 and RISC-V system simulator
https://d3s.mff.cuni.cz/software/msim/
GNU General Public License v2.0
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Investigate proper handling when ERL bit is set #10

Open vhotspur opened 4 years ago

vhotspur commented 4 years ago

There seems to be a difference in handling translations between virtual and physical addresses in MSIM 1.3.8.5 and current HEAD when ERL bit is set.

Not yet sure which version behaves correctly, perhaps the old MSIM treats the condition for Cache error and ERL=1 for any exception.