d-iii-s / msim

Light-weight MIPS R4000 and RISC-V system simulator
https://d3s.mff.cuni.cz/software/msim/
GNU General Public License v2.0
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Split drvcpu csrrd into more sections #38

Open vhotspur opened 1 year ago

vhotspur commented 1 year ago

The csrrd dump of RISC-V CPU is rather long and for debugging purposes in our courses most of the counters are not really needed (and only clutter the view).

It might make sense to split this into two commands and remove the performance counters from the basic dump.