d-iii-s / msim

Light-weight MIPS R4000 and RISC-V system simulator
https://d3s.mff.cuni.cz/software/msim/
GNU General Public License v2.0
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Invalid status register shall not terminate simulation #6

Closed vhotspur closed 3 years ago

vhotspur commented 4 years ago

If the status register is badly set (cp0_status_ksu == 3) MSIM may terminate on assertion in either convert_addr_kernel32 or convert_addr_kernel64 because of ASSERT(CPU_KERNEL_MODE(cpu)); (inside cpu.c, called from convert_addr).

It should probably be better to throw an exception (perhaps excCpU for Coprocessor Unusable) to allow the user debug the problem instead of aborting forcefully.

[Reproducible with Kalisto if one of the mfc0 $status is commented out in the context switch code.]