CVC: Allow both SCRC power and SCRC ground in same logic.
CVC: Ignore gate-source errors for SCRC nets.
CVC: For calculated voltages, when CVC_LOGIC_DIODE is true, instead of pmos gate-source error, expect sim voltage low.
CVC: Don't explicitly release memory at program termination unless debug mode. (was causing core dumps).
CVC: Allow both SCRC power and SCRC ground in same logic. CVC: Ignore gate-source errors for SCRC nets. CVC: For calculated voltages, when CVC_LOGIC_DIODE is true, instead of pmos gate-source error, expect sim voltage low. CVC: Don't explicitly release memory at program termination unless debug mode. (was causing core dumps).