Closed AlessandroMinali closed 3 years ago
https://github.com/d0iasm/rvemu-for-book/blob/eedfb402e84548406dc34c44d91328f76b35232c/01/src/main.rs#L85-L88
You mention that this is the instruction for adding 64-bit integers. From the RISC-V spec this opcode is only for 32-bit integers.
I think I may be misunderstanding something so I'll just close this.
https://github.com/d0iasm/rvemu-for-book/blob/eedfb402e84548406dc34c44d91328f76b35232c/01/src/main.rs#L85-L88
You mention that this is the instruction for adding 64-bit integers. From the RISC-V spec this opcode is only for 32-bit integers.