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daglem / reDIP-SID

MOS 6581 / 8580 SID FPGA emulation platform
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5V-tolerant FPGA? #10

Closed sorgelig closed 1 year ago

sorgelig commented 1 year ago

Hi!

in readme you wrote: 

All FPGA I/O is 5V tolerant, and can drive 5V TTL.

If it is true then why board uses level shifter?

daglem commented 1 year ago

The FPGA I/O is only available on the pin headers, and there it is 5V tolerant, because of the level shifter.

The FPGA in itself is not 5V tolerant.

sorgelig commented 1 year ago

May be it's worth to modify readme to All board I/O is 5V tolerant instead of FPGA