example led can't be build

[quantrpeter]

Hi When i type make i got

2.49. Executing BLIF backend.
ERROR: Found unmapped processes in module top: unmapped processes are not supported in BLIF backend!
make: *** [build] Error 1

My toolchain is built from github latest version

>yosys --version
Yosys 0.15+57 (git sha1 207417617, clang 13.0.0 -fPIC -Os)

thanks

[damdoy]

Hi,

These examples have been only tested with the version 0.9 of yosys (see readme for the version of all the tools). So if you downgrade yosys to this previous version it should work.

However, I want to make all examples be synthesizeable with more modern versions, so I will look into this issue.

[damdoy]

Hi again,

After a long time I finally found what was the problem, a missing -top top command in the yosys command in the Makefiles, to indicate which verilog module is at the top of the hierarchy, was probably inferred automatically in previous versions but not anymore.

In any case, I updated all the Makefiles and took the advantage to use the newer nextpnr instead of arachne-pne.

[quantrpeter]