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danielholanda / LeFlow

Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks
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Using Xilinx FPGAs and AXI memory interfaces #33

Closed ivanfv closed 4 years ago

ivanfv commented 4 years ago

Hello,

I am very interested on LeFlow. I am trying to use Xilinx FPGAs with AXI memory interfaces. As far as I know, LegUp supports to create this kind of memory interfaces by setting an argument.

I was looking to LeFlow code and didn't find where to set up arguments for LegUp. Do you have any suggestion or direction where should I look for? Is it there any source file where all the arguments are set?

Thanks a lot, Ivan

danielholanda commented 4 years ago

Hi Ivan,

Sorry for the terrible delay in replying.

I don't recall the open-source version of LegUp having AXI memory interface support. I suspect that this is only possible in their commercial version. Unfortunately, when using LeFlow, we are limited to directly reading and writing directly from/to on-chip memory.

ivanfv commented 4 years ago

Hi Daniel,

I understand, thanks a lot for your reply.

Best, Ivan