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darklife / darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
BSD 3-Clause "New" or "Revised" License
2.1k stars 282 forks source link

Verilator Support #33

Closed samsoniuk closed 11 months ago

samsoniuk commented 3 years ago

Add a set of verilator scripts, as suggested in the issue #19