ESP32-C6 ?

[ErfanDL]

Hi @dchristl It would be great if you could develop the ESP32-C6 version so we can use 802.11AX Wi-Fi 6

[dchristl]

Hello @ErfanDL ,

I don't think adding this boar should be a real problem. But the testing is. If you have such a board and want to test I'm happy to provide binarys for flashing. If everything works fine, I can add it to the releases.

Kind Regards, Danny

[ErfanDL]

Hello @ErfanDL ,

I don't think adding this boar should be a real problem. But the testing is. If you have such a board and want to test I'm happy to provide binarys for flashing. If everything works fine, I can add it to the releases.

Kind Regards, Danny

Thanks for your reply, I have built my own ESP32-C6 development board. I would be grateful if you could provide the ESP32-C6 binary for me to test.

[dchristl]

Here we go: firmware-esp32-c6.zip

You can flash the esp32-c6-nat_extended_full.bin like any other device or (if it doesn't work, because I can't test it) or the bootloader, partition and firmware with esptool.py --baud 115200 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 40m --flash_size detect 0x1000 bootloader.bin 0x10000 firmware.bin 0x8000 partitions.bin

If everything works I can add it to the "official" releases and make OTA-updates available.

[ErfanDL]

Here we go: firmware-esp32-c6.zip

You can flash the esp32-c6-nat_extended_full.bin like any other device or (if it doesn't work, because I can't test it) or the bootloader, partition and firmware with esptool.py --baud 115200 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 40m --flash_size detect 0x1000 bootloader.bin 0x10000 firmware.bin 0x8000 partitions.bin

If everything works I can add it to the "official" releases and make OTA-updates available.

thanks for the binary. I uploaded the bins to ESP32C6 but it getting boot loop

ESP-ROM:esp32c6-20220919
Build:Sep 19 2022
rst:0x15 (USB_UART_HPSYS),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40018bea
SPIWP:0xee
mode:DIO, clock div:2
load:0x4086c410,len:0xd04
load:0x4086e610,len:0x2cbc
load:0x71630008,len:0x17fd06e6
Invalid image block, can't boot.
ets_main.c 331 

[dchristl]

Now it is hard for me to help you without a device. Maybe it is possible that the bootloader is at address 0x0 instead of 0x1000.

You can change your command to:

esptool.py --baud 115200 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 40m --flash_size detect 0x0 bootloader.bin 0x10000 firmware.bin 0x8000 partitions.bin

[ErfanDL]

I did this and it no longer bootloops, but the "ESP32_NAT_Router" ssid not displayed.

[DevCode01]

it's working, thank you

[ErfanDL]

it's working, thank you

How did it work for you?

[dchristl]

it's working, thank you

I'm also interested in, what you have done to make it work.

[kondakos]

It's working, updated python and esptool with "esptool --baud 115200 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 40m --flash_size detect 0x0 bootloader.bin 0x10000 firmware.bin 0x8000 partitions.bin"

the esptool report

C:\Users\tk\Downloads\esp>esptool -p COM6 flash_id esptool.py v4.7.0 Serial port COM6 Connecting.... Detecting chip type... ESP32-C6 Chip is ESP32-C6 (QFN40) (revision v0.0) Features: WiFi 6, BT 5, IEEE802.15.4 Crystal is 40MHz MAC: 54:32:04:ff:fe:XX:XX:XX BASE MAC: 54:32:04:XX:XX:XX MAC_EXT: ff:fe Uploading stub... Running stub... Stub running... Manufacturer: 5e Device: 4017 Detected flash size: 8MB Hard resetting via RTS pin...

Thank you

[kondakos]

[kondakos]

Good results . Direct connection from 4m to home WIFI 2.4 Mhz AP from 21 Mbps/4Mbps goes to 7Mbps/3Mbps when connection from 4m with the ESP32C6.

[ErfanDL]

It's working, updated python and esptool with "esptool --baud 115200 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 40m --flash_size detect 0x0 bootloader.bin 0x10000 firmware.bin 0x8000 partitions.bin"

the esptool report

C:\Users\tk\Downloads\esp>esptool -p COM6 flash_id esptool.py v4.7.0 Serial port COM6 Connecting.... Detecting chip type... ESP32-C6 Chip is ESP32-C6 (QFN40) (revision v0.0) Features: WiFi 6, BT 5, IEEE802.15.4 Crystal is 40MHz MAC: 54:32:04:ff:fe:XX:XX:XX BASE MAC: 54:32:04:XX:XX:XX MAC_EXT: ff:fe Uploading stub... Running stub... Stub running... Manufacturer: 5e Device: 4017 Detected flash size: 8MB Hard resetting via RTS pin...

Thank you

so why its not worked for me ? :(

Detecting chip type... ESP32-C6 Chip is ESP32-C6 (QFN40) (revision v0.0) Features: WiFi 6, BT 5, IEEE802.15.4 Crystal is 40MHz MAC: 40:4c:ca:ff:fe:49:59:e4 BASE MAC: 40:4c:ca:49:59:e4 MAC_EXT: ff:fe Uploading stub... Running stub... Stub running... Configuring flash size... Auto-detected Flash size: 16MB Flash will be erased from 0x00000000 to 0x00005fff... Flash will be erased from 0x00010000 to 0x0016cfff... Flash will be erased from 0x00008000 to 0x00008fff... Warning: Image file at 0x0 is protected with a hash checksum, so not changing the flash size setting. Use the --flash_size=keep option instead of --flash_size=16MB in order to remove this warning, or use the --dont-append-digest option for the elf2image command in order to generate an image file without a hash checksum Compressed 21312 bytes to 12912... Wrote 21312 bytes (12912 compressed) at 0x00000000 in 0.3 seconds (effective 492.8 kbit/s)... Hash of data verified. Compressed 1427904 bytes to 734995... Wrote 1427904 bytes (734995 compressed) at 0x00010000 in 8.6 seconds (effective 1328.8 kbit/s)... Hash of data verified. Compressed 3072 bytes to 113... Wrote 3072 bytes (113 compressed) at 0x00008000 in 0.0 seconds (effective 517.4 kbit/s)... Hash of data verified.

[dchristl]

I don't know this makes any difference, but have you seen the output of your command:

Warning: Image file at 0x0 is protected with a hash checksum, so not changing the flash size setting. Use the --flash_size=keep option instead of --flash_size=16MB in order to remove this warning, or use the --dont-append-digest option for the elf2image command in order to generate an image file without a hash checksum

It seems you have an encrypted bootloader. Maybe you have success with

esptool.py --baud 115200 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 40m --flash_size keep 0x0 bootloader.bin 0x10000 firmware.bin 0x8000 partitions.bin

You can also try to erase the ESP32 before with:

esptool.py erase_flash

[ErfanDL]

I don't know this makes any difference, but have you seen the output of your command:

Warning: Image file at 0x0 is protected with a hash checksum, so not changing the flash size setting. Use the --flash_size=keep option instead of --flash_size=16MB in order to remove this warning, or use the --dont-append-digest option for the elf2image command in order to generate an image file without a hash checksum

It seems you have an encrypted bootloader. Maybe you have success with

esptool.py --baud 115200 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 40m --flash_size keep 0x0 bootloader.bin 0x10000 firmware.bin 0x8000 partitions.bin

You can also try to erase the ESP32 before with:

esptool.py erase_flash

I tried but it didn't worked. I never encrypted the bootloader on my esp32c6 here the summary

espefuse.py v4.7.0 Connecting... Detecting chip type... ESP32-C6 BLOCK0 ( ) [0 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 MAC_SPI_8M_0 (BLOCK1 ) [1 ] read_regs: ca4959e4 fffe404c 00000000 08000000 00000000 00000000 BLOCK_SYS_DATA (BLOCK2 ) [2 ] read_regs: ed8b8278 72492f16 1d7f5659 3b205fab ec269f78 071043f0 3dc781b8 11311111 BLOCK_USR_DATA (BLOCK3 ) [3 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 BLOCK_KEY0 (BLOCK4 ) [4 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 BLOCK_KEY1 (BLOCK5 ) [5 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 BLOCK_KEY2 (BLOCK6 ) [6 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 BLOCK_KEY3 (BLOCK7 ) [7 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 BLOCK_KEY4 (BLOCK8 ) [8 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 BLOCK_KEY5 (BLOCK9 ) [9 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 BLOCK_SYS_DATA2 (BLOCK10 ) [10] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

BLOCK0 ( ) [0 ] err__regs: 00000000 00000000 00000000 00000000 00000000 00000000 EFUSE_RD_RS_ERR0_REG 0x00000000 EFUSE_RD_RS_ERR1_REG 0x00000000

EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)

Calibration fuses: ACTIVE_HP_DBIAS (BLOCK1) Stores the active hp dbias = 0 R/W (0b00000) ACTIVE_LP_DBIAS (BLOCK1) Stores the active lp dbias = 0 R/W (0b00000) LSLP_HP_DBIAS (BLOCK1) Stores the lslp hp dbias = 0 R/W (0x0) DSLP_LP_DBIAS (BLOCK1) Stores the dslp lp dbias = 0 R/W (0x0) DBIAS_VOL_GAP (BLOCK1) Stores the hp and lp dbias vol gap = 0 R/W (0b00000) TEMP_CALIB (BLOCK2) Temperature calibration data = -12.0 R/W (0b101111000) OCODE (BLOCK2) ADC OCode = 79 R/W (0x4f) ADC1_INIT_CODE_ATTEN0 (BLOCK2) ADC1 init code at atten0 = -76 R/W (0b1000010011) ADC1_INIT_CODE_ATTEN1 (BLOCK2) ADC1 init code at atten1 = -116 R/W (0b1000011101) ADC1_INIT_CODE_ATTEN2 (BLOCK2) ADC1 init code at atten2 = -124 R/W (0b1000011111) ADC1_INIT_CODE_ATTEN3 (BLOCK2) ADC1 init code at atten3 = -128 R/W (0b1000100000) ADC1_CAL_VOL_ATTEN0 (BLOCK2) ADC1 calibration voltage at atten0 = 12 R/W (0b0000000011) ADC1_CAL_VOL_ATTEN1 (BLOCK2) ADC1 calibration voltage at atten1 = 220 R/W (0b0000110111) ADC1_CAL_VOL_ATTEN2 (BLOCK2) ADC1 calibration voltage at atten2 = -240 R/W (0b1000111100) ADC1_CAL_VOL_ATTEN3 (BLOCK2) ADC1 calibration voltage at atten3 = -492 R/W (0b1001111011) ADC1_INIT_CODE_ATTEN0_CH0 (BLOCK2) ADC1 init code at atten0 ch0 = 0 R/W (0x8) ADC1_INIT_CODE_ATTEN0_CH1 (BLOCK2) ADC1 init code at atten0 ch1 = 0 R/W (0x8) ADC1_INIT_CODE_ATTEN0_CH2 (BLOCK2) ADC1 init code at atten0 ch2 = 0 R/W (0x8) ADC1_INIT_CODE_ATTEN0_CH3 (BLOCK2) ADC1 init code at atten0 ch3 = 0 R/W (0x8) ADC1_INIT_CODE_ATTEN0_CH4 (BLOCK2) ADC1 init code at atten0 ch4 = 0 R/W (0x8) ADC1_INIT_CODE_ATTEN0_CH5 (BLOCK2) ADC1 init code at atten0 ch5 = -4 R/W (0x9) ADC1_INIT_CODE_ATTEN0_CH6 (BLOCK2) ADC1 init code at atten0 ch6 = 0 R/W (0x8)

Config fuses: WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00000000) RD_DIS (BLOCK0) Disable reading from BlOCK4-10 = 0 R/W (0b0000000) SWAP_UART_SDIO_EN (BLOCK0) Represents whether pad of uart and sdio is swapped = False R/W (0b0) or not. 1: swapped. 0: not swapped DIS_ICACHE (BLOCK0) Represents whether icache is disabled or enabled. = False R/W (0b0) 1: disabled. 0: enabled DIS_TWAI (BLOCK0) Represents whether TWAI function is disabled or en = False R/W (0b0) abled. 1: disabled. 0: enabled DIS_DIRECT_BOOT (BLOCK0) Represents whether direct boot mode is disabled or = False R/W (0b0) enabled. 1: disabled. 0: enabled UART_PRINT_CONTROL (BLOCK0) Set the default UARTboot message output mode = Enable R/W (0b00) LSLP_HP_DBG (BLOCK1) Stores the lslp hp dbg = 0 R/W (0b00) DSLP_LP_DBG (BLOCK1) Stores the dslp lp dbg = 0 R/W (0b000) BLOCK_USR_DATA (BLOCK3) User data = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved) = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W

Flash fuses: FLASH_TPUW (BLOCK0) Represents the flash waiting time after power-up; = 0 R/W (0x0) in unit of ms. When the value less than 15; the wa iting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value FORCE_SEND_RESUME (BLOCK0) Represents whether ROM code is forced to send a re = False R/W (0b0) sume command during SPI boot. 1: forced. 0:not for ced FLASH_CAP (BLOCK1) = 0 R/W (0b000) FLASH_TEMP (BLOCK1) = 0 R/W (0b00) FLASH_VENDOR (BLOCK1) = 0 R/W (0b000)

Identity fuses: DISABLE_WAFER_VERSION_MAJOR (BLOCK0) Disables check of wafer version major = False R/W (0b0) DISABLE_BLK_VERSION_MAJOR (BLOCK0) Disables check of blk version major = False R/W (0b0) WAFER_VERSION_MINOR (BLOCK1) = 0 R/W (0x0) WAFER_VERSION_MAJOR (BLOCK1) = 0 R/W (0b00) PKG_VERSION (BLOCK1) Package version = 0 R/W (0b000) BLK_VERSION_MINOR (BLOCK1) BLK_VERSION_MINOR of BLOCK2 = 1 R/W (0b001) BLK_VERSION_MAJOR (BLOCK1) BLK_VERSION_MAJOR of BLOCK2 = 0 R/W (0b00) OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID = 78 82 8b ed 16 2f 49 72 59 56 7f 1d ab 5f 20 3b R/W

Jtag fuses: JTAG_SEL_ENABLE (BLOCK0) Represents whether the selection between usb_to_jt = False R/W (0b0) ag and pad_to_jtag through strapping gpio15 when b oth EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled SOFT_DIS_JTAG (BLOCK0) Represents whether JTAG is disabled in soft way. O = 0 R/W (0b000) dd number: disabled. Even number: enabled DIS_PAD_JTAG (BLOCK0) Represents whether JTAG is disabled in the hard wa = False R/W (0b0) y(permanently). 1: disabled. 0: enabled

Mac fuses: MAC (BLOCK1) MAC address = 40:4c:ca:49:59:e4 (OK) R/W MAC_EXT (BLOCK1) Stores the extended bits of MAC address = ff:fe (OK) R/W CUSTOM_MAC (BLOCK3) Custom MAC = 00:00:00:00:00:00 (OK) R/W MAC_EUI64 (BLOCK1) calc MAC_EUI64 = MAC[0]:MAC[1]:MAC[2]:MAC_EXT[0]:M = 40:4c:ca:ff:fe:49:59:e4 (OK) R/W AC_EXT[1]:MAC[3]:MAC[4]:MAC[5]

Security fuses: DIS_DOWNLOAD_ICACHE (BLOCK0) Represents whether icache is disabled or enabled i = False R/W (0b0) n Download mode. 1: disabled. 0: enabled DIS_FORCE_DOWNLOAD (BLOCK0) Represents whether the function that forces chip i = False R/W (0b0) nto download mode is disabled or enabled. 1: disab led. 0: enabled SPI_DOWNLOAD_MSPI_DIS (BLOCK0) Represents whether SPI0 controller during boot_mod = False R/W (0b0) e_download is disabled or enabled. 1: disabled. 0: enabled DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Represents whether flash encrypt function is disab = False R/W (0b0) led or enabled(except in SPI boot mode). 1: disabl ed. 0: enabled SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000) and disables otherwise SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0) SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0) SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0) KEY_PURPOSE_0 (BLOCK0) Represents the purpose of Key0 = USER R/W (0x0) KEY_PURPOSE_1 (BLOCK0) Represents the purpose of Key1 = USER R/W (0x0) KEY_PURPOSE_2 (BLOCK0) Represents the purpose of Key2 = USER R/W (0x0) KEY_PURPOSE_3 (BLOCK0) Represents the purpose of Key3 = USER R/W (0x0) KEY_PURPOSE_4 (BLOCK0) Represents the purpose of Key4 = USER R/W (0x0) KEY_PURPOSE_5 (BLOCK0) Represents the purpose of Key5 = USER R/W (0x0) SEC_DPA_LEVEL (BLOCK0) Represents the spa secure level by configuring the = 0 R/W (0b00) clock random divide mode CRYPT_DPA_ENABLE (BLOCK0) Represents whether anti-dpa attack is enabled. 1:e = False R/W (0b0) nabled. 0: disabled SECURE_BOOT_EN (BLOCK0) Represents whether secure boot is enabled or disab = False R/W (0b0) led. 1: enabled. 0: disabled SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Represents whether revoking aggressive secure boot = False R/W (0b0) is enabled or disabled. 1: enabled. 0: disabled DIS_DOWNLOAD_MODE (BLOCK0) Represents whether Download mode is disabled or en = False R/W (0b0) abled. 1: disabled. 0: enabled ENABLE_SECURITY_DOWNLOAD (BLOCK0) Represents whether security download is enabled or = False R/W (0b0) disabled. 1: enabled. 0: disabled SECURE_VERSION (BLOCK0) Represents the version used by ESP-IDF anti-rollba = 0 R/W (0x0000) ck feature SECURE_BOOT_DISABLE_FAST_WAKE (BLOCK0) Represents whether FAST VERIFY ON WAKE is disabled = False R/W (0b0) or enabled when Secure Boot is enabled. 1: disabl ed. 0: enabled BLOCK_KEY0 (BLOCK4) Purpose: USER Key0 or user data = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK_KEY1 (BLOCK5) Purpose: USER Key1 or user data = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK_KEY2 (BLOCK6) Purpose: USER Key2 or user data = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK_KEY3 (BLOCK7) Purpose: USER Key3 or user data = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK_KEY4 (BLOCK8) Purpose: USER Key4 or user data = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK_KEY5 (BLOCK9) Purpose: USER Key5 or user data = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W

Usb fuses: DIS_USB_JTAG (BLOCK0) Represents whether the function of usb switch to j = False R/W (0b0) tag is disabled or enabled. 1: disabled. 0: enable d DIS_USB_SERIAL_JTAG (BLOCK0) Represents whether USB-Serial-JTAG is disabled or = False R/W (0b0) enabled. 1: disabled. 0: enabled USB_EXCHG_PINS (BLOCK0) Represents whether the D+ and D- pins is exchanged = False R/W (0b0) . 1: exchanged. 0: not exchanged DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Represents whether print from USB-Serial-JTAG is d = False R/W (0b0) isabled or enabled. 1: disabled. 0: enabled DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Represents whether the USB-Serial-JTAG download fu = False R/W (0b0) nction is disabled or enabled. 1: disabled. 0: ena bled

Vdd fuses: VDD_SPI_AS_GPIO (BLOCK0) Represents whether vdd spi pin is functioned as gp = False R/W (0b0) io. 1: functioned. 0: not functioned

Wdt fuses: WDT_DELAY_SEL (BLOCK0) Represents whether RTC watchdog timeout threshold = 0 R/W (0b00) is selected at startup. 1: selected. 0: not select ed

[ErfanDL]

@dchristl can you build it for 16MB ESP32C6 ?

[kondakos]

The flash size (8 vs 16 ) maybe is the difference that produce the error.

[kondakos]

@dchristl can you build it for 16MB ESP32C6 ?

You can try flash with specific argument for 16Mb flash size.

Setting Flash Mode and Size

You may also need to specify arguments for flash mode and flash size, if you wish to override the defaults. For example:

esptool.py --port /dev/ttyUSB0 write_flash --flash_mode qio --flash_size 32m 0x0 bootloader.bin 0x1000 my_app.bin

Since esptool v2.0, these options are not often needed as the default is to keep the flash mode and size from the .bin image file. See the Flash Modes section for more details.

[dchristl]

can you build it for 16MB ESP32C6 ?

It is only possible to build for a chip not a specific hardware of it. As kondakos mentioned, you can try different parameters during flashing, although that shouldn't be necessary.

You also seem to have exactly the same chip as him (QFN40) with 40 pins, so I can't quite understand why it's not working for you. Do you possibly have a second ESP32 C6 to rule out a hardware defect?

If I understand correctly, the flashing process worked in general. Could you please post the log from the serial console again? Maybe that will provide a clue.

[kondakos]

The board that flashed is: ESP32 / ESP32-C6 WiFi+Bluetooth Internet Of Things Dual Type-C Development Board Core Board ESP32-C6-DevKit C N4R2 https://www.aliexpress.com/item/1005005664230988.html

At first the flash image was Tasmota 13.4.0.1(arduino30) by Theo Arends working just fine. Flash via (https://tasmota.github.io/install/) at first the https://ota.tasmota.com/tasmota32/tasmota32c6cdc-arduino30.factory.bin Option : Erase then via device web page https://ota.tasmota.com/tasmota32/tasmota32c6cdc-arduino30.bin to check the device. This operations FULL erase the Flash and create partitions. The installation of the nat router flash maybe don't full erase the device parameters. So give a try. ESP Chip Id 16776716 (ESP32-C6 v0.0) Flash Chip Id 0x17405E (QIO) Flash Size 8192 KB Program Flash Size 8192 KB

Which reports. c:\Users\tk\Downloads\esp>esptool -p COM7 flash_id esptool.py v4.7.0 Serial port COM7 Connecting.... Detecting chip type... ESP32-C6 Chip is ESP32-C6 (QFN40) (revision v0.0) Features: WiFi 6, BT 5, IEEE802.15.4 Crystal is 40MHz MAC: 54:32:04xxxxxxxxxxxx BASE MAC: 54:32:04:xxxxxxxxxx MAC_EXT: ff:fe Uploading stub... Running stub... Stub running... Manufacturer: 5e Device: 4017 Detected flash size: 8MB Hard resetting via RTS pin...

Flash the image : c:\Users\tk\Downloads\esp>esptool --baud 115200 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 40m --flash_size detect 0x0 bootloader.bin 0x10000 firmware.bin 0x8000 partitions.bin esptool.py v4.7.0 Found 1 serial ports Serial port COM7 Connecting.... Detecting chip type... ESP32-C6 Chip is ESP32-C6 (QFN40) (revision v0.0) Features: WiFi 6, BT 5, IEEE802.15.4 Crystal is 40MHz MAC: 54:32:04:xxxxxxxxxxx BASE MAC: 54:32:04:xxxxxxx MAC_EXT: ff:fe Uploading stub... Running stub... Stub running... Configuring flash size... Auto-detected Flash size: 8MB Flash will be erased from 0x00000000 to 0x00005fff... Flash will be erased from 0x00010000 to 0x0016cfff... Flash will be erased from 0x00008000 to 0x00008fff... Warning: Image file at 0x0 is protected with a hash checksum, so not changing the flash size setting. Use the --flash_size=keep option instead of --flash_size=8MB in order to remove this warning, or use the --dont-append-digest option for the elf2image command in order to generate an image file without a hash checksum Compressed 21312 bytes to 12912... Wrote 21312 bytes (12912 compressed) at 0x00000000 in 1.3 seconds (effective 133.8 kbit/s)... Hash of data verified. Compressed 1427904 bytes to 734995... Wrote 1427904 bytes (734995 compressed) at 0x00010000 in 64.7 seconds (effective 176.5 kbit/s)... Hash of data verified. Compressed 3072 bytes to 113... Wrote 3072 bytes (113 compressed) at 0x00008000 in 0.0 seconds (effective 562.2 kbit/s)... Hash of data verified.

Leaving... Hard resetting via RTS pin...

Without doing anything the wifi router is available and working fine.

Also check. https://docs.espressif.com/projects/esptool/en/latest/esp32/troubleshooting.html https://docs.espressif.com/projects/esptool/en/latest/esp32/troubleshooting.html

[kondakos]

Hello @ErfanDL , I don't think adding this boar should be a real problem. But the testing is. If you have such a board and want to test I'm happy to provide binarys for flashing. If everything works fine, I can add it to the releases. Kind Regards, Danny

Thanks for your reply, I have built my own ESP32-C6 development board. I would be grateful if you could provide the ESP32-C6 binary for me to test.

You have to try another one

https://docs.espressif.com/projects/esptool/en/latest/esp32/troubleshooting.html#insufficient-capacitance

https://user-images.githubusercontent.com/205573/30140831-9da417a6-93ba-11e7-95c3-f422744967de.jpg

[kondakos]

Hello @ErfanDL ,

I don't think adding this boar should be a real problem. But the testing is. If you have such a board and want to test I'm happy to provide binarys for flashing. If everything works fine, I can add it to the releases.

Kind Regards, Danny

Please add the image for ESP32C6 to the releases and provide updates. Thank you.

[ErfanDL]

can you build it for 16MB ESP32C6 ?

It is only possible to build for a chip not a specific hardware of it. As kondakos mentioned, you can try different parameters during flashing, although that shouldn't be necessary.

You also seem to have exactly the same chip as him (QFN40) with 40 pins, so I can't quite understand why it's not working for you. Do you possibly have a second ESP32 C6 to rule out a hardware defect?

If I understand correctly, the flashing process worked in general. Could you please post the log from the serial console again? Maybe that will provide a clue.

I tried every possible flash parameters but didn't worked. here the serial output: Update: (I used GPIO12 and GPIO13 for internal USB connection).

ESP-ROM:esp32c6-20220919 Build:Sep 19 2022 rst:0x1 (POWERON),boot:0x8 (SPI_FAST_FLASH_BOOT) SPIWP:0xee mode:DIO, clock div:2 load:0x4086c410,len:0xd4c load:0x4086e610,len:0x2dd0 load:0x40875728,len:0x17d0 entry 0x4086c410 I (23) boot: ESP-IDF 5.1.2 2nd stage bootloader I (24) boot: compile time Feb 10 2024 11:02:35 I (24) boot: chip revision: v0.0 I (26) boot.esp32c6: SPI Speed : 80MHz I (31) boot.esp32c6: SPI Mode : DIO I (36) boot.esp32c6: SPI Flash Size : 4MB I (41) boot: Enabling RNG early entropy source... I (46) boot: Partition Table: I (49) boot: ## Label Usage Type ST Offset Length I (57) boot: 0 nvs WiFi data 01 02 00009000 00005000 I (64) boot: 1 otadata OTA data 01 00 0000e000 00002000 I (72) boot: 2 ota_0 OTA app 00 10 00010000 00177000 I (79) boot: 3 ota_1 OTA app 00 11 00190000 00177000 I (87) boot: End of partition table I (91) esp_image: segment 0: paddr=00010020 vaddr=420e0020 size=6c1b8h (442808) map I (191) esp_image: segment 1: paddr=0007c1e0 vaddr=40800000 size=03e38h ( 15928) load I (200) esp_image: segment 2: paddr=00080020 vaddr=42000020 size=d64bch (877756) map I (382) esp_image: segment 3: paddr=001564e4 vaddr=40803e38 size=12d00h ( 77056) load I (401) esp_image: segment 4: paddr=001691ec vaddr=40816b40 size=0373ch ( 14140) load I (405) esp_image: segment 5: paddr=0016c930 vaddr=50000000 size=00068h ( 104) load I (412) boot: Loaded app from partition at offset 0x10000 I (413) boot: Disabling RNG early entropy source... I (429) cpu_start: Unicore app I (430) cpu_start: Pro cpu up. W (438) clk: esp_perip_clk_init() has not been implemented yet I (445) cpu_start: Pro cpu start user code I (445) cpu_start: cpu freq: 160000000 Hz I (445) cpu_start: Application information: I (448) cpu_start: Project name: esp32_nat_router_extended I (455) cpu_start: App version: DEV-VERSION I (460) cpu_start: Compile time: Feb 10 2024 11:01:44 I (466) cpu_start: ELF file SHA256: 7d3efeb99fd9872e... I (472) cpu_start: ESP-IDF: 5.1.2 I (477) cpu_start: Min chip rev: v0.0 I (481) cpu_start: Max chip rev: v0.99 I (486) cpu_start: Chip rev: v0.0 I (491) heap_init: Initializing. RAM available for dynamic allocation: I (498) heap_init: At 4081FB30 len 0005CAE0 (370 KiB): D/IRAM I (505) heap_init: At 4087C610 len 00002F54 (11 KiB): STACK/DIRAM I (511) heap_init: At 50000068 len 00003F80 (15 KiB): RTCRAM I (519) spi_flash: detected chip: generic I (522) spi_flash: flash io: dio W (526) spi_flash: Detected size(16384k) larger than the size in the binary imag e header(4096k). Using the size in the binary image header. I (540) sleep: Configure to isolate all GPIO pins in sleep state I (546) sleep: Enable automatic switching of GPIO sleep configuration I (553) coexist: coex firmware version: b6d5e8c I (559) coexist: coexist rom version 5b8dcfa I (564) app_start: Starting scheduler on CPU0 I (569) main_task: Started on CPU0 I (569) main_task: Calling app_main() I (579) gpio: GPIO[12]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldo wn: 0| Intr:0 I (579) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldow n: 0| Intr:0 W (1639) ESP32NRE: Reset Pin (GPIO 12) set for 1s I (1639) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldo wn: 0| Intr:0 W (2639) ESP32NRE: Reset Pin (GPIO 12) set for 2s I (2639) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldo wn: 0| Intr:0 W (3639) ESP32NRE: Reset Pin (GPIO 12) set for 3s I (3639) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldo wn: 0| Intr:0 W (4639) ESP32NRE: Reset Pin (GPIO 12) set for 4s I (4639) gpio: GPIO[2]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 W (5639) ESP32NRE: Reset Pin (GPIO 12) set for 5s W (5639) ESP32NRE: Device will be resetted! Disconnect bridge and reboot device afterwards. I (5639) cmd_nvs: Namespace 'esp32_nat' was erased I (5639) main_task: Returned from app_main()

the circuit:

[ErfanDL]

Now worked with external power (not USB) because the ESP32C6 internal USB using GPIO12 and the ESP32C6 keep reset factory at bootup !

[dchristl]

Great, that it's working now. Could one of you both test the following:

• Flash the attached full.bin again. I have now modified it, and it should be flashable directly.
• After making some settings, please flash the firmware.bin from my first post at address 0x10000 (this simulates an OTA update) and check if the settings are retained.

If everything works, I can include the image in the next release. There is still some work to be done (OTA updates, pin assignments, sleep mode, build, etc.) before I can release it. However, with the attached pre-release version, most things should work for now.

esp32-c6-nat_extended_full.zip

[ErfanDL]

Great, that it's working now. Could one of you both test the following:

* Flash the attached full.bin again. I have now modified it, and it should be flashable directly.

* After making some settings, please flash the firmware.bin from my first post at address 0x10000 (this simulates an OTA update) and check if the settings are retained.

If everything works, I can include the image in the next release. There is still some work to be done (OTA updates, pin assignments, sleep mode, build, etc.) before I can release it. However, with the attached pre-release version, most things should work for now.

esp32-c6-nat_extended_full.zip

Yes everything works... Thank you very much for your efforts

[kondakos]

From tasmota firmware the new attached full.bin flashed. Working. After making some settings, flashed the firmware.bin from first post at address 0x10000 Everything working Thank you

Both firmware have a bug. When you put Bandwith 40Mhz the device crashed and bootlooping .

ELF file SHA256: 7d3efeb99fd9872e

Rebooting... ESP-ROM:esp32c6-20220919 Build:Sep 19 2022 rst:0xc (SW_CPU),boot:0xc (SPI_FAST_FLASH_BOOT) Saved PC:0x4001975a SPIWP:0xee mode:DIO, clock div:2 load:0x4086c410,len:0xd4c load:0x4086e610,len:0x2dd0 load:0x40875728,len:0x17d0 entry 0x4086c410 I (26) boot: ESP-IDF 5.1.2 2nd stage bootloader I (27) boot: compile time Feb 10 2024 11:02:35 I (28) boot: chip revision: v0.0 I (30) boot.esp32c6: SPI Speed : 80MHz I (34) boot.esp32c6: SPI Mode : DIO I (39) boot.esp32c6: SPI Flash Size : 4MB I (44) boot: Enabling RNG early entropy source... I (49) boot: Partition Table: I (53) boot: ## Label Usage Type ST Offset Length I (60) boot: 0 nvs WiFi data 01 02 00009000 00005000 I (68) boot: 1 otadata OTA data 01 00 0000e000 00002000 I (75) boot: 2 ota_0 OTA app 00 10 00010000 00177000 I (82) boot: 3 ota_1 OTA app 00 11 00190000 00177000 I (90) boot: End of partition table I (94) esp_image: segment 0: paddr=00010020 vaddr=420e0020 size=6c1b8h (442808) map I (283) esp_image: segment 1: paddr=0007c1e0 vaddr=40800000 size=03e38h ( 15928) load I (292) esp_image: segment 2: paddr=00080020 vaddr=42000020 size=d64bch (877756) map I (650) esp_image: segment 3: paddr=001564e4 vaddr=40803e38 size=12d00h ( 77056) load I (687) esp_image: segment 4: paddr=001691ec vaddr=40816b40 size=0373ch ( 14140) load I (695) esp_image: segment 5: paddr=0016c930 vaddr=50000000 size=00068h ( 104) load I (706) boot: Loaded app from partition at offset 0x10000 I (707) boot: Disabling RNG early entropy source... I (718) cpu_start: Unicore app I (719) cpu_start: Pro cpu up. W (728) clk: esp_perip_clk_init() has not been implemented yet I (735) cpu_start: Pro cpu start user code I (735) cpu_start: cpu freq: 160000000 Hz I (735) cpu_start: Application information: I (738) cpu_start: Project name: esp32_nat_router_extended I (745) cpu_start: App version: DEV-VERSION I (750) cpu_start: Compile time: Feb 10 2024 11:01:44 I (756) cpu_start: ELF file SHA256: 7d3efeb99fd9872e... I (762) cpu_start: ESP-IDF: 5.1.2 I (767) cpu_start: Min chip rev: v0.0 I (771) cpu_start: Max chip rev: v0.99 I (776) cpu_start: Chip rev: v0.0 I (781) heap_init: Initializing. RAM available for dynamic allocation: I (788) heap_init: At 4081FB30 len 0005CAE0 (370 KiB): D/IRAM I (795) heap_init: At 4087C610 len 00002F54 (11 KiB): STACK/DIRAM I (801) heap_init: At 50000068 len 00003F80 (15 KiB): RTCRAM I (809) spi_flash: detected chip: generic I (812) spi_flash: flash io: dio W (816) spi_flash: Detected size(8192k) larger than the size in the binary image header(4096k). Using the size in the binary image header. I (830) sleep: Configure to isolate all GPIO pins in sleep state I (836) sleep: Enable automatic switching of GPIO sleep configuration I (843) coexist: coex firmware version: b6d5e8c I (849) coexist: coexist rom version 5b8dcfa I (854) app_start: Starting scheduler on CPU0 I (859) main_task: Started on CPU0 I (859) main_task: Calling app_main() I (879) gpio: GPIO[12]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 I (879) ESP32NRE: Device will boot up normally. I (889) cmd_router: custom_mac 54:32:4:c:49:0 I (889) ESP32NRE: Setting custom MAC address: 54:32:4:c:49:0 I (889) cmd_router: netmask 255.255.255.0 I (909) cmd_router: netmask 255.255.255.0 I (909) ESP32NRE: Netmask is set to 255.255.255.0, therefore private IP is 192.168.4.1 I (919) pp: pp rom version: 5b8dcfa I (919) net80211: net80211 rom version: 5b8dcfa I (929) wifi:wifi driver task: 40827f2c, prio:23, stack:6656, core=0 I (939) wifi:wifi firmware version: 91b9630 I (939) wifi:wifi certification version: v7.0 I (939) wifi:config NVS flash: enabled I (939) wifi:config nano formating: disabled I (949) wifi:mac_version:HAL_MAC_ESP32AX_761,ut_version:N I (949) wifi:Init data frame dynamic rx buffer num: 32 I (959) wifi:Init static rx mgmt buffer num: 5 I (959) wifi:Init management short buffer num: 32 I (959) wifi:Init dynamic tx buffer num: 32 I (979) wifi:Init static tx FG buffer num: 2 I (979) wifi:Init static rx buffer size: 1700 I (979) wifi:Init static rx buffer num: 10 I (989) wifi:Init dynamic rx buffer num: 32 I (989) wifi_init: rx ba win: 6 I (989) wifi_init: tcpip mbox: 32 I (999) wifi_init: udp mbox: 6 I (999) wifi_init: tcp mbox: 6 I (999) wifi_init: tcp tx win: 5744 I (1009) wifi_init: tcp rx win: 5744 I (1009) wifi_init: tcp mss: 1440 I (1009) wifi_init: WiFi IRAM OP enabled I (1019) wifi_init: WiFi RX IRAM OP enabled I (1019) ESP32NRE: Setting the bandwith to 40 MHz ESP_ERROR_CHECK failed: esp_err_t 0x102 (ESP_ERR_INVALID_ARG) at 0x42001d0a file: "src/esp32_nat_router.c" line 581 func: wifi_init expression: esp_wifi_set_bandwidth(ESP_IF_WIFI_STA, WIFI_BW_HT40)

abort() was called at PC 0x40809217 on core 0 Core 0 register dump: MEPC : 0x4080217a RA : 0x40809222 SP : 0x408228d0 GP : 0x40817344 TP : 0x407b7300 T0 : 0x37363534 T1 : 0x7271706f T2 : 0x33323130 S0/FP : 0x00000004 S1 : 0x40822934 A0 : 0x408228fc A1 : 0x40822932 A2 : 0x00000000 A3 : 0x40822929 A4 : 0x00000001 A5 : 0x4081f000 A6 : 0x00000000 A7 : 0x76757473 S2 : 0x4087edec S3 : 0x4087e50c S4 : 0x4087eda4 S5 : 0x4087ee40 S6 : 0x4087ed24 S7 : 0x4087ed64 S8 : 0x00000000 S9 : 0x00000000 S10 : 0x00000000 S11 : 0x00000000 T3 : 0x6e6d6c6b T4 : 0x6a696867 T5 : 0x66656463 T6 : 0x62613938 MSTATUS : 0x00001881 MTVEC : 0x40800001 MCAUSE : 0x00000007 MTVAL : 0x00000000 MHARTID : 0x00000000

Stack memory: 408228d0: 0x420e049c 0x42001d0e 0x40822930 0x4080ee0c 0x00001800 0x00000018 0x408257fc 0x40819918 408228f0: 0x40822934 0x40819934 0x40822930 0x726f6261 0x20292874 0x20736177 0x6c6c6163 0x61206465 40822910: 0x43502074 0x34783020 0x39303830 0x20373132 0x63206e6f 0x2065726f 0x00000030 0x00000000 40822930: 0x00000030 0x30383034 0x37313239 0x4087e500 0x4087edec 0x00000000 0x4087e7a8 0x4080921a 40822950: 0x4087edec 0x00000000 0x4087e7a8 0x42001d0e 0x00009100 0x00000020 0x4081b1ac 0x4080adba 40822970: 0x00000000 0x00000020 0x40818e84 0x4204e364 0xffffffff 0xffffffff 0x40818e84 0x4080346a 40822990: 0xffffffff 0xffffffff 0x40818e84 0x40802540 0x00000000 0x00000020 0x420e0844 0x4080431c 408229b0: 0x00000020 0x00000020 0x00000000 0x40804210 0x00009100 0x00000020 0x00000000 0x40803d06 408229d0: 0xffffffff 0xffffffff 0x420e0844 0x40818e14 0x00000020 0x00000020 0x00000000 0x40804210 408229f0: 0x00000014 0x00000001 0x00000007 0x40822aec 0x40822aec 0x4087cff4 0x00000020 0x420d07ec 40822a10: 0x00009d40 0x00000020 0x00000000 0x40803d06 0x00000001 0x4087cff4 0x00000006 0x4204b8ce 40822a30: 0x40822b40 0x4087cff4 0x00000000 0x4204c2e2 0x4087ee70 0x4087cff4 0x00000006 0x4204cb56 40822a50: 0x000000ff 0x4087cff4 0x00000006 0x000000ff 0xff001401 0x0000000f 0x6574636f 0x00000074 40822a70: 0x00000000 0x00000000 0xffffffff 0xffffffff 0x4087ee70 0x4087ee70 0x00000000 0x4204be72 40822a90: 0x00000000 0x4087cff4 0x00000000 0x4204cac4 0x40822bfc 0x40822bfc 0x00000004 0x000000ff 40822ab0: 0xff004801 0x00000004 0x74726f70 0x5f70616d 0x00626174 0x00000000 0xffffffff 0xffffffff 40822ad0: 0x00000000 0x00000000 0x4082080c 0x00000000 0x00000000 0x00000001 0x40816fb8 0x00000074 40822af0: 0x00000001 0x420526ca 0x420526b4 0x42055b30 0x420527ec 0x42055b82 0x42055b66 0x42055bb8 40822b10: 0x42055b9c 0x420527fc 0x42055b18 0x42055d70 0x42056ac8 0x40000748 0x420526a6 0x42055bd2 40822b30: 0x42055bfa 0x42052698 0x42055c08 0x42055c30 0x42055c3e 0x42055ca8 0x42055e9e 0x4205f77e 40822b50: 0x4205f836 0x42052682 0x42055b00 0x42052686 0x0000000a 0x00000020 0x00000001 0x00000000 40822b70: 0x00000020 0x00000000 0x00000005 0x00000000 0x00000000 0x00000001 0x00000001 0x00000000 40822b90: 0x00000001 0x00000000 0x00000006 0x00000000 0x000002f0 0x00000020 0x00000001 0x00000000 40822bb0: 0x00000001 0x00000007 0x1f2f3f4f 0x42049240 0x408257ec 0x408257cc 0x0104a8c0 0x00ffffff 40822bd0: 0x0104a8c0 0x00000000 0x00000000 0x420495d0 0x00000000 0x421393e8 0x00001102 0x00000000 40822bf0: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x4081f000 0x4200236c 40822c10: 0x00000000 0x00000000 0x40822c54 0x40822c3c 0x00000000 0x00000000 0x00000001 0x4080c3e2 40822c30: 0x00000000 0x4087ccf0 0x00000000 0x00000000 0x00000000 0x00000000 0x42128000 0x4080c3ea 40822c50: 0x00000000 0x00001388 0x00000001 0x00000000 0x00000000 0x00000000 0x00000000 0x4080c110 40822c70: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 40822c90: 0x00000000 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0x00000154 0x40822830 40822cb0: 0x00000007 0x4081a9c8 0x4081a9c8 0x40822cac 0x4081a9c0 0x00000018 0x4087de28 0x4087de28

ELF file SHA256: 7d3efeb99fd9872e

[dchristl]

I've published a new release, containing the ESP32-C6 firmware. If you have any probleme, please let me know.

I (1019) ESP32NRE: Setting the bandwith to 40 MHz ESP_ERROR_CHECK failed: esp_err_t 0x102 (ESP_ERR_INVALID_ARG) at 0x42001d0a

Your error is only when connected to 802.11ax-network, because this is not supported. See specifications ( Enhanced Connectivity):

ESP32-C6 supports a 20 MHz bandwidth for the 802.11ax mode and a 20/40 MHz bandwidth for the 802.11b/g/n mode.

The error should not occur anymore; however, the setting does not have an effect on ax networks.

[ErfanDL]

I've published a new release, containing the ESP32-C6 firmware. If you have any probleme, please let me know.

I (1019) ESP32NRE: Setting the bandwith to 40 MHz ESP_ERROR_CHECK failed: esp_err_t 0x102 (ESP_ERR_INVALID_ARG) at 0x42001d0a

Your error is only when connected to 802.11ax-network, because this is not supported. See specifications ( Enhanced Connectivity):

ESP32-C6 supports a 20 MHz bandwidth for the 802.11ax mode and a 20/40 MHz bandwidth for the 802.11b/g/n mode.

The error should not occur anymore; however, the setting does not have an effect on ax networks.

thank you. The only problem is, the factory reset pin is the same as the internal USB pin (GPIO12), which leads to a factory reset during startup. If possible, set the factory reset pin to another GPIO for esp32c6 build.

[dchristl]

The only problem is, the factory reset pin is the same as the internal USB pin (GPIO12), which leads to a factory reset during startup. If possible, set the factory reset pin to another GPIO for esp32c6 build.

That's not usual, most other chips usually have it on pin 18 or 19. Could you please provide more details? Does this happen consistently, or only under certain conditions (e.g., after flashing)? Why doesn't @kondakos have the issue? Are there different versions?

Which pin on the C6 Dev Boards would be easily accessible or bridgeable for me to use?

[ErfanDL]

The only problem is, the factory reset pin is the same as the internal USB pin (GPIO12), which leads to a factory reset during startup. If possible, set the factory reset pin to another GPIO for esp32c6 build.

That's not usual, most other chips usually have it on pin 18 or 19. Could you please provide more details? Does this happen consistently, or only under certain conditions (e.g., after flashing)? Why doesn't @kondakos have the issue? Are there different versions?

Which pin on the C6 Dev Boards would be easily accessible or bridgeable for me to use?

this problem is consistently when using USB host (not UART for flashing). some esp32c6 dev boards dosn't have UART and using USB host pins for flashing (GPIO12 and GPIO13). if possible change the reset factory pin for esp32c6 to GPIO18.

[dchristl]

@ErfanDL ,

could you please try it out, if everything works: firmware.zip

You can flash the firmware with:

esptool.py write_flash -z --flash_mode dio --flash_freq 40m --flash_size detect 0x10000 firmware.bin

[ErfanDL]

@ErfanDL ,

could you please try it out, if everything works: firmware.zip

You can flash the firmware with:

esptool.py write_flash -z --flash_mode dio --flash_freq 40m --flash_size detect 0x10000 firmware.bin

Hi. Unfortunately, it has the problem of the previous version. Did you change the factory reset pin?

[dchristl]

Yes, I changed it to GPIO 18. Maybe, I have picked the wrong firmware on upload. Can you please retry with firmware.zip

Thank you

[ErfanDL]

Yes, I changed it to GPIO 18. Maybe, I have picked the wrong firmware on upload. Can you please retry with firmware.zip

Thank you

thanks. the problem is solved with this firmware