Use a GPIO as SPI CS

[fvillml]

Thanks for the scripts, they work very well on an Up Squared! However I would need to control more than two spi devices with the Up board so I would like to use some GPIO as chip select. Any Idea on how to do that with ACPI overlays? I tried with the following code but it didn't work

/*
 * This ASL can be used to declare a spidev device on SPI0 CS2
 */
DefinitionBlock ("", "SSDT", 5, "INTEL", "SPIDEV2", 1)
{

    External (_SB_.PCI0.SPI1, DeviceObj)
    External (_SB_.PCI0.GIP0.GPO, DeviceObj)

    Scope (\_SB.PCI0.SPI1)
    {

        Name (_CRS, ResourceTemplate () {
            GpioIo (Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
                    "\\_SB.PCI0.GIP0.GPO", 0) {22} // pin 22 is BCM25 or 402 in linux
        })

        Name (_DSD, Package () {
            ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
            Package () {
                Package () {
                    "cs-gpios", Package () {^SPI1, 0, 0, 0},
                },
            }
        })

        Device (TP2) {
            Name (_HID, "SPT0001")
            Name (_DDN, "SPI test device connected to CS2")
            Name (_CRS, ResourceTemplate () {
                SpiSerialBus (
                    2,                      // Chip select
                    PolarityLow,            // Chip select is active low
                    FourWireMode,           // Full duplex
                    8,                      // Bits per word is 8 (byte)
                    ControllerInitiated,    // Don't care
                    1000000,                // 10 MHz
                    ClockPolarityLow,       // SPI mode 0
                    ClockPhaseFirst,        // SPI mode 0
                    "\\_SB.PCI0.SPI1",      // SPI host controller
                    0                       // Must be 0
                )
            })
        }
    }
}

[fvillml]

This code works, I can see now a device on /dev/spidev1.21

/*
 * This ASL can be used to declare a spidev device on SPI0 CS2
 */
DefinitionBlock ("", "SSDT", 5, "INTEL", "SPIDEV2", 1)
{
    External (_SB_.PCI0.SPI1, DeviceObj)
    External (_SB_.PCI0.GIP0.GPO, DeviceObj)

    Scope (\_SB.PCI0.SPI1)
    {

        Name (_CRS, ResourceTemplate () {
            GpioIo (Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
                "\\_SB.PCI0.GIP0.GPO", 0) {
                    22 // pin 22 is BCM25 or 402 in linux
                } 
        })

        Name (_DSD, Package() {
            ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
            Package () {
                Package () { "compatible", "spidev" }, // not sure if this is needed
                Package () {
                    "cs-gpios", Package () {
                        0,
                        0,
                        ^SPI1, 0, 0, 0, // index 0 in _CRS -> pin 22
                    }
                },
            }
        })

        Device (TP2) {
            Name (_HID, "SPT0001")
            Name (_DDN, "SPI test device connected to CS2")
            Name (_CRS, ResourceTemplate () {
                SpiSerialBus (
                    2,                      // Chip select
                    PolarityLow,            // Chip select is active low
                    FourWireMode,           // Full duplex
                    8,                      // Bits per word is 8 (byte)
                    ControllerInitiated,    // Don't care
                    1000000,                // 10 MHz
                    ClockPolarityLow,       // SPI mode 0
                    ClockPhaseFirst,        // SPI mode 0
                    "\\_SB.PCI0.SPI1",      // SPI host controller
                    0                       // Must be 0
                )
            })
        }
    }
}