Cache L2-U: 4x 1MB (5MB)

[dd86k]

version: v0.18.1-17-gbc40cb7

Output:

Name:        GenuineIntel 11th Gen Intel(R) Core(TM) i5-1135G7 @ 2.40GHz
Identifier:  Family 6 Model 140 Stepping 1
Cores:       4 cores 8 threads
Techs:       x86-64-v4 EIST TurboBoost-3.0 HTT
SSE:         SSE SSE2 SSE3 SSSE3 SSE4.1 SSE4.2
AVX:         AVX AVX2 AVX512F +CD +DQ +BW +VL +IFMA +VBMI +VBMI2 +GFNI +VAES +VNNI +BITALG +VP2INTERSECT
AMX:         None
Others:      AES-NI ADX SHA BMI1 BMI2
Mitigations: IBRS STIBP SSBD L1D_FLUSH MD_CLEAR CET_IBT CET_SS
Cache L1-D:  4x 48KB    (192KB)
Cache L1-I:  4x 32KB    (128KB)
Cache L2-U:  4x 1MB     (5MB)
Cache L3-U:  1x 8MB     (8MB)

Table:

$ ddcpuid -r -S 4 -s 4
| Leaf     | Sub-leaf | EAX      | EBX      | ECX      | EDX      |
|----------|----------|----------|----------|----------|----------|
|        4 |        0 | 1c004121 |  2c0003f |       3f |        0 |
|        4 |        1 | 1c004122 |  1c0003f |       3f |        0 |
|        4 |        2 | 1c004143 |  4c0003f |      3ff |        0 |
|        4 |        3 | 1c03c163 |  1c0003f |     3fff |        4 |
|        4 |        4 |        0 |        0 |        0 |        0 |

[dd86k]

The issue is the level cache size being 1280. This translated to (4 * 1280) >> 10 giving 5. The issue was not the 5 itself but the fact that if >= 1024, >>= was applied.

Now summary view will have 1.25MB and detailed view will have its value unchanged at 1280KB.