[RESOLVED] Unsynchronized frames

[Pascal66]

How can this be explained ? The RAW are followed by my own decoder (Look at the recurrent (but wrong) pattern) The FSK packet are VARIABLE, no CRC check Synchro & preamble are fine Doesnt Work : (Only CONTINOUS) ESP_ERROR_CHECK(sx127x_set_opmod(SX127x_MODE_RX_SINGLE, SX127x_MODULATION_FSK, device)); Maybe configuring the main part ? :

  while (1) {
    vTaskDelay(

Or clear the FIFO in ? :

void handle_interrupt_task(void *arg) {
  while (1) {
    vTaskSuspend(NULL);
    // vTaskDelay(pdMS_TO_TICKS(10)); // Wait 10 millis
    sx127x_handle_interrupt((sx127x *)arg);
  }
}

I (00:08:42.011) sx127x_RAW: f3 ff 7e fc ff 6f ff f9 ff 77 f7 ff fd 9b fe fe 
I (00:08:42.012) sx127x_RAW: fe bc af fd fb ff bf bf f7 cd ff ff e9 ff ed fe
I (00:08:42.016) sx127x_RAW: 79 e7 ff f7 7f e7 fc ed 
7089FB3F1062FB3F0000000040000000000000000000000000000000F1000000745FFB3F40000000
I (00:09:07.291) sx127x_RAW: ff f5 f2 73 ef d5 f7 77 3e e7 7b 5b 7b ff ba f3 
I (00:09:07.292) sx127x_RAW: eb 7d 9e 97 e0 ef e7 b8 f8 cd f4 cc 37 fb f6 cf
I (00:09:07.296) sx127x_RAW: 79 b5 be fb e7 df 7b fe 
3F1062FB3F0000000040000000000000000000000000000000DB000000745FFB3F40000000106AFB
I (00:09:24.291) sx127x_RAW: fe ff 9f 8c fd 7b 7b be d0 f3 fe 23 73 5f fa 8f 
I (00:09:24.291) sx127x_RAW: cb e7 e7 ce 16 4a 54 0d 03 0d 0f be e4 77 ee 8f
I (00:09:24.295) sx127x_RAW: 57 ff 6c c3 ea fe cf f5
62FB3F0000000040000000000000000000000000000000F9000000745FFB3F40000000106AFB3FAD
I (00:10:07.601) sx127x_RAW: 94 81 18 5a f4 65 45 f7 4c 10 24 21 43 50 10 04 
I (00:10:07.601) sx127x_RAW: 41 2e 45 9f 9f df ff ff ff ff ff ff ff ff f5 d5
I (00:10:07.606) sx127x_RAW: 55 55 55 55 55 55 55 55 
FB3F1062FB3F000000004000000000000000000000000000000095000000745FFB3F40000000106A

[dernasherbrezon]

Let me clarify:

1. In which mode it works and in which mode it doesn't?
2. If you don't have CRC, then you might get spurious signals. Check "gain" setting on your own decoder and sx127x.
3. You should process message as fast as you could. Otherwise next message might overwrite contents of FIFO buffer.

  while (1) {
    vTaskSuspend(NULL);
    sx127x_handle_interrupt((sx127x *)arg);
  }

4. Sorry I cannot see any pattern in the bytes. Can you please share it?

[Pascal66]

Some registers are not well configured, for example: 0x1f -> 0x2a wich put the preamble detection to off 0x1f must be at 0xAA, tried to force it, and unable to write the register your command 'sx127x_fsk_ook_rx_set_preamble_detector' seems fine.

[dernasherbrezon]

Have you figured out where the issue was? Was it in the library?

[Pascal66]

Have you figured out where the issue was? Was it in the library?

I resolved it using directly my own register values. Still at 0x2A and not 0xAA as expected, but it work. I've to look closer at SX1276SKA source code

[dernasherbrezon]

Can't reproduce it. Can you try to dump all registers into the serial / console before switching to RX mode? I can debug registers using "dump_registers" tool.

  uint8_t registers[0x80];
  sx127x_dump_registers(registers, device);
  for (int i = 0; i < sizeof(registers); i++) {
    if (i != 0) {
      printf(",");
    }
    printf("0x%x", registers[i]);
  }
  printf("\n");

[Pascal66]

Still searching but you have at least one error and not time to search all

printf("0x09: RegPaConfig:\n"); value = regs[0x09]; // Not value = regs[0x07]; if ((value & 0b10000000) == 0b10000000) { printf("\tPaSelect=PA_BOOST pin\n"); } else { printf("\tPaSelect=RFO pin\n"); }

[dernasherbrezon]

Thank you! Fixed: https://github.com/dernasherbrezon/sx127x/commit/432ffda7250a3687cdc760cd6d3dc8c987b99cee