Closed Mani-Sadhasivam closed 7 months ago
There's a reason D3 support cannot be determined through the Power Management Control/Status Register (unlike D1 and D2, which can): It's mandatory for all functions per PCIe r6.1 sec 5.3.1:
All Functions must support the D0 and D3 states (both D3Hot and D3Cold). The D1 and D2 states are optional.
Unfortunately in practice, for PCIe bridges, D3 is not always supported.
Please add the above to the commit message.
@l1k Done!
If the default in the spec is supported, then the property should be to disable it.
If the default in the spec is supported, then the property should be to disable it.
Spec supports it by default, but not all the bridges. That's why the property has to enable it.
If the default in the spec is supported, then the property should be to disable it.
Spec supports it by default, but not all the bridges. That's why the property has to enable it.
No. Default is D3 supported because the spec says it should be supported, so a property should be a quirk to disable it.
No. Default is D3 supported because the spec says it should be supported, so a property should be a quirk to disable it.
That wouldn't accurately describe the HW. As you know, PCIe devices have a history of violating specs, so if we add the property based on the spec, then there would be a disconnect w.r.t the implementation. For instance, if we name it disable-d3
, then it implies that the bridges that don't have this property are all supporting D3, but in reality, they aren't. And trying to enable D3, will break the bridges that don't support it.
What's the behavior for a PCI bridge with no firmware node? D3 is disabled? Does this go back to the long standing problem that runtime PM is disabled for PCI?
Yes, D3 is disabled for the bridge by default. The goal here is to safely enable D3 for capable bridges.
There is no standard way to detect the D3 support of the PCI-PCI bridges. So let's add a new property, "supports-d3" to specify that the bridge supports transitioning to D3 states.