Need semantic checks for arrays

dgrnbrg / piplin

Compile Clojure to FPGAs

piplin.org

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Need semantic checks for arrays #48

Open dgrnbrg opened 12 years ago

dgrnbrg commented 12 years ago

Whether the index's bit width matches up to the array's
Are there no assoc in the body of modules when synthesizing
Do the assigned-to indices in the connect-impl have neither the array nor the index constant (code won't work w/ constant atm)

dgrnbrg commented 12 years ago

Perhaps all memories should be feedbacks? I'm not sure if it makes sense to expose them as outputs; however, the fact that all outputs are registered makes that difficult. Perhaps there's a way to enforce correct usage for verilog semantics.