Don't generate {0'b0, x}

[dgrnbrg]

Instead of generating {0'b0, x}, we must generate x, since XST doesn't like the former (and I'm assuming other tools won't like it either).

[dgrnbrg]

Solved this 80% by having bit-cat's verilog generator not generate a concat operator ({x,y}) if x or y is zero width, but it now throws an exception if x and y are both zero width. A better way that handles all cases would be to preprocess for logic simplification where we prune out all zero-width concats.