dgschwend / zynqnet

Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"
GNU General Public License v3.0
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something about codes #45

Open leeeexp opened 6 years ago

leeeexp commented 6 years ago

hello dgschwend: typedef ap_uint<23> memaddr_t; // must remain <= 23 bits to fit into float why must remain <= 23 bits to fit into float? can I USE typedef ap_uint<32> memaddr_t;

dgschwend commented 6 years ago

Hi! Yes I think that‘s just a stale comment. Give it a try! ;) Background: Initially, the idea was to copy also the layer configuration to the FPGA (shared mem), and have the entire network executed on the FPGA independent of the CPU. However, the FPGA memory port (SHARED_DRAM) can only have one data type in HLS, in this case float32. In order to read integers such as memory offsets (= memaddr_t), I would simply cast the float back to integer. Because re-interpretation casts are also not supported in HLS, I would need to do a normal cast. Because the float-mantissa is 23 bits, integers with <= 23 bits can be perfectly converted.