dgschwend / zynqnet

Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"
GNU General Public License v3.0
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About how to generate zynqnet_200M.bit #51

Open YzwWh9327 opened 6 years ago

YzwWh9327 commented 6 years ago

Hi! I have used the HLS generate the FPGA_TOP IPcore.But now I have no idea to generate zynqnet_200M.bit.