dineshannayya / riscduino

Arduino compatible Risc-V Based SOC
Apache License 2.0
136 stars 23 forks source link

Discrepencies in the readme. #24

Open iamkarthikbk opened 1 year ago

iamkarthikbk commented 1 year ago

Hi.

Your readme says this:

Step-2: Clone , update the Submodule, unzip the content

   git clone https://github.com/dineshannayya/riscduino.git
   cd riscduino
   git submodule init
   git submodule update
   make unzip

but the commands don't do what is expected. has there been an update which has not been reflected in this readme ? make unzip complains about lef/*.gz files being missing. Is there something im missing?

Thanks in advance!

dineshannayya commented 1 year ago

Normally I remove lef/ gds/ folder from the repo to keep git repo smaller; As these folder are need only silicon tapeout only (You can mask these unzip function inside Makefile).

Any how, I have check-in these folder back, you can resync the repo.

Vinayakamk commented 1 year ago

thanks ,for the reply sir, but in verilog gl file is also broken while unziping. as u said ,,whether i can remove gzip verliog from make file?

! image

dineshannayya commented 1 year ago

You can skip/bypass the zip/unzip step, there are only required for tapeout package release.