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dinosaure / gilbraltar

MirageOS on RPi4
ISC License
58 stars 4 forks source link

multiple CPUs? #5

Open hannesm opened 2 years ago

hannesm commented 2 years ago

So, any idea what the other cores should be doing while one is executing one MirageOS unikernel?

One idea would be to have one unikernel per CPU - thus a dedicated network unikernel etc. -- but then there needs to be some communication channel between the unikernels (shared memory? who'd set this up?). I'm thinking mostly in terms of muen policy and channels (i.e. decided at compile time, not at runtime, where code is executed and which communication is setup).

What do you think?

dinosaure commented 2 years ago

The current layout (see the boot.S) tries to use CPU0 and execute the main program on it with a specific stack position. Others cores are not used - but they can be used on the C side if we want, minor some asm instr.

A possible idea is to be able to make an unikernel with 4 entry points and ask on the asm/C side to run our CPU on these entry points. About sharing date, we should use the MMU to allocate a shared memory area between unikernels. I think it can be an interesting idea but the work is huge (it's not easy to talk to the MMU via asm/C).

However, at this time, I will try to polish first the usage of one unikernel with GPIO and a re-implementation of select/poll on our UART impl. to provide then a mirage-gilbraltar with lwt.