Closed dirkwhoffmann closed 1 year ago
Doesn't that situation trigger a double bus fault? Section 5.4.4 of the 68000UM says:
"When a bus error exception occurs, the processor begins exception processing by stacking information on the supervisor stack. If another bus error occurs during exception processing (i.e., before execution of another instruction begins) the processor halts and asserts HALT. This is called a double bus fault. Only an external reset operation can restart a processor halted due to a double bus fault."
Maybe a dialog could show in the emulator, prompting the user to click a button and reset the emulated computer.
Sorry in advance if I'm confused and this reply is not related to what you are asking.
This should be fine by now. There are two test suits covering odd exception vectors (generated with cputester): ODDEXC_000.hdf
and ODDEXC_010.hdf
. vAmiga passes both of them.
If an exception vector points to an odd address, Moira reads a word from this address without checking for address violations.
I am unsure what the CPU is supposed to do in this case. If the address error exception vector is odd, does the CPU enter an infinite loop? 🤔
If somebody knows how the real CPU deals with odd exception vectors, please let me know.