Test sprdma3 fails

[dirkwhoffmann]

SAE: 👍

vAmiga: 🙈

Here is the thing: The test case disables sprite DMA at cycle 12. The way how sprite DMA events are scheduled causes vAmiga to still execute the first sprite DMA cycle, but not the second. This causes sprite DMA to loose sync (visible by the change to blue color of the leftmost sprite).

[647] (137, 12)  07006A BCB-D- 606C 1000 Agnus: Sprite DMA switched off
[647] (137, 21)  07006A BCB-D- 606C 1000 Agnus: executeFirstSpriteCycle<0> (125,157)
[647] (153, 12)  07006A BCBSD- 606C 1000 Agnus: Sprite DMA switched on
[647] (154, 21)  07006A BCBSD- 606C 1000 Agnus: executeFirstSpriteCycle<0> (125,157)
[647] (154, 23)  07006A BCBSD- 606C 1000 Agnus: executeSecondSpriteCycle<0>
[647] (154, 25)  07006A BCBSD- 606C 1000 Agnus: executeFirstSpriteCycle<1> (0,0)
[647] (154, 27)  07006A BCBSD- 606C 1000 Agnus: executeSecondSpriteCycle<1>

I think it's best to replace the current scheduling code of the DAS slot (Disk, Audio, Sprite DMA) by code similar to the BPL slot (Bitplane DMA). Currently, bitplane DMA is managed by an event table whereas Disk, Audio, Sprite DMA is managed by a simple list storing successor events. Unfortunately, this is a bigger architectural change.

[dirkwhoffmann]

fixed