Closed dirkwhoffmann closed 5 years ago
Omega write into CIA A space at PC = fe982a
. This PC is reached before reaching fe89da
which is my current standard breakpoint.
vAmiga does not reach fe982a
before reaching fe89da
.
I started running vAmiga against SAE. The first CIA A accesses read as follows in SAE:
vAmiga reads back:
[83] (156, 26) FC0514: ---- 4004 0020: CIAA: Peek 0 (hex: 00) = 254 (DDRA = 3) [83] (156, 26) FC0514: ---- 4004 0020: CIAA: Poke 00,FC [83] (156, 26) FC0514: ---- 4004 0020: CIAA: ## PA changed: /FIR1: 1 /FIR0: 1 /RDY: 1 /TK0: 1 /WPRO: 1 /CHNG: 1 /LED: 0 OVL: 0
More precisely: vAmiga reads 254 where SAE reads 226:
254 = 11111110
226 = 11100010
Seems like vAmiga needs to invert the disk bits (which is strange, because these bits are marked as active low in the HRM).
Drive identification looks good.
After the identification has been completed, another mismatch happens:
vAmiga reads back 0:
[84] ( 42,181) FC6D10: --BD 602C 0060: CIAB: Peek 15 (hex: 0F) = 0
[84] ( 42,181) FC6D10: --BD 602C 0060: CIAB: Poke(15) = 0 (hex: 00)
[84] ( 42,194) FC6D16: --BD 602C 0060: CIAB: Poke(10) = 0 (hex: 00)
[84] ( 42,200) FC6D1A: --BD 602C 0060: CIAB: Poke(9) = 0 (hex: 00)
SAE uses 4 as the initial value for the control registers. Strange, because I don't think this reflects what the real hardware does.
ciaacra = ciaacrb = ciabcra = ciabcrb = 0x4;
There seems to be an interesting discrepancy in this region:
[85] ( 2, 33) FE5484: PCBD 602C 0040: CIAA: Poke(14) = 0 (hex: 00)
[85] ( 2, 39) FE5488: PCBD 602C 0040: CIAA: Poke(14) = 0 (hex: 00)
[85] ( 2, 45) FE548E: PCBD 602C 0040: CIAA: Poke(14) = 64 (hex: 40)
[85] ( 3, 43) FC4722: PCBD 202C 0040: CIAA: Poke(13) = 136 (hex: 88)
[85] ( 3,191) FE5498: PCBD 602C 0040: CIAA: Poke(14) = 0 (hex: 00)
[85] ( 29,188) FE58D0: PCBD 602C 0040: CIAA: Peek 2 (hex: 02) = 3
[85] ( 29,188) FE58D0: PCBD 602C 0040: CIAA: Poke(2) = 3 (hex: 03)
SAE:
It's not easy to compare both emulators from here on, because VSYNC interrupts start to interfere.
The first IRQ in SAE is a level 3 VSYNC interrupt. It occurs after the second write to BLTSIZE. Same in vAmiga which is good so far ...
I think I'm coming closer. The displayed SAE log shows that the serial port interrupt of CIA A gets enabled during boot (first write statement). After that, a VSYNC interrupt triggers (which has higher priority than the SP interrupt). When the VSYNC int is over, the SP interrupt is performed (level 2 IRQ).
As far as I remember, my CIAs don't implement the SP interrupt, because they are taken from VirtualC64 and the C64 does not really use the serial register. Definitely a smoking gun ...
CIA A triggers keyboard interrupts now. The keyboard behaves like a real Amiga keyboard and sends a POWER_UP_KEY_STREAM id code on startup, followed by a KB_TERMINATE_KEY_STREAM id code.
Next strange sequence is the following in vAmiga:
[85] ( 70,168) FE931C: PCBD 202C 0040: CIAA: Peek 7 (hex: 07) = 255
[85] ( 70,179) FE9316: PCBD 202C 0040: CIAA: Peek 8 (hex: 08) = 0
[85] ( 70,189) FE931C: PCBD 202C 0040: CIAA: Peek 7 (hex: 07) = 255
[85] ( 70,200) FE9316: PCBD 202C 0040: CIAA: Peek 8 (hex: 08) = 0
[85] ( 70,210) FE931C: PCBD 202C 0040: CIAA: Peek 7 (hex: 07) = 255
[85] ( 70,221) FE9316: PCBD 202C 0040: CIAA: Peek 8 (hex: 08) = 0
...
This sequence also appears in SAE, but it seems to terminate faster in SAE.
Fixed
By comparing Omega's bootstrap output with vAmiga's, I notices that Omega is triggering a CIA A interrupt at some point:
This interrupt does not occur in vAmiga, because vAmiga is yet programmed to crash on the first CIA A interrupt. This is most likely the reason why the hand & disk picture is not drawn.