Closed djeemie2000 closed 9 years ago
Clock signal is a pulse (50% pwm). The rising edge is used. Frequency based on bpm/bars per beat + subdivision (e.g. 128) => 120 bpm, 1 bpb, subdivision 128 => 256 Hz
Use case: driving a step sequencer with step duration (subdivision 128)
Used dedicated clock module
Clock signal is a pulse (50% pwm). The rising edge is used. Frequency based on bpm/bars per beat + subdivision (e.g. 128) => 120 bpm, 1 bpb, subdivision 128 => 256 Hz
Use case: driving a step sequencer with step duration (subdivision 128)