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dmitrodem / p1735_decryptor

IEEE P1735 decryptor for VHDL
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Verilog format support #2

Open iDoka opened 1 year ago

iDoka commented 1 year ago

I suppose it could be supported a verilog files. Please, see my suggested changes:

--- a/P1735Parser.py
+++ b/P1735Parser.py

-        protect_kw = pp.Keyword('`protect').suppress()
+        protect_kw = pp.Keyword('`pragma protect').suppress()
iDoka commented 1 year ago

Based on this example of VHDLProtected syntax https://firsteda.com/news/how-to-secure-your-ip-with-encryption/ , no another changes between .vhdp and .vp files