Closed alexispolti closed 2 years ago
Hi Alexis. Thank you for this tip. I think adding some conditionals will be better than creating a new source. See this branch. BTW. Looks like UID offsets must be corrected for all F0 series. Unfortunately, there is nothing about this in the section 27 Device electronic signature of the RM0360 STM32F030x4/x6/x8/xC and STM32F070x6/xB advanced ARM®-based 32-bit MCUs Reference manual. But I have read and compared data at 0x1FFFFFFAC for the F070 and F030 samples I have in my lab:
STM32F070CBT6 GQ29U 1C98 CHN GQ 819
27 00 38 00 0D 51 53 58 35 30 30 20 F0 06 F2 05
FC FF FF FF FF FF 34 05 FF FF FF FF F3 FF FF FF
STM32F070F6P6 7836 PHL 834
2F 00 21 00 13 43 4E 58 35 33 30 20 F2 06 09 06
FC FF FF FF FF FF 25 05 FF FF FF FF C3 FF FF FF
STM32F030F4P6 78963 PHL 729
0E 00 17 00 0C 57 34 4E 31 39 31 20 D4 06 F0 05
F0 FF FF FF FF FF 27 05 FF FF FF FF FC FF FF FF
STM32F030F4P6 78963 PHL 729
0E 00 2A 00 0C 57 34 4E 31 39 31 20 DC 06 F6 05
F0 FF FF FF FF FF 2E 05 FF FF FF FF FC FF FF FF
The data structure looks same as described in section 27 of the RM0091 STM32F0x1/STM32F0x2/STM32F0x8 advanced ARM®-based 32-bit MCUs
Sorry for the late reply, I didn't get the notification. Yes, your're right, condtionals are better! Concerning the register mapping, I had to review each ref manual one by one (which was quite tedious) but effectvely I didn't find any address for the mentioned processors. But in the ST FW package support, it appears that the signature is at base + 0, +4 and +8. See: https://github.com/STMicroelectronics/STM32CubeF0/blob/master/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c (line 438 and following)
I think you can close this PR, thanx again for your wonderful work!
The following CPU STM32L072xx, STM32L073xx, STM32F042x6, STM32F048xx, STM32F072xB and STM32F078xx store their MCU at base, base+4 and base+8 (instead of base+14). This MR fixes that.