Replace old monitor with nonstandard timing using GBS 8200

[pborut]

I want to replace old monitor in some old measurement device with standard LCD monitor. I have RGB video source with nonstandard timing HS = 20,8 kHz and VS = 56.5 Hz.Each color has only 8 levels, HS and VS are separate signals. Pixel clock is 16.257 Mhz. Some part of border of input picture could also be missing in output picture. Is it possible to set up registers, so that this input resolution will be accepted and displayed correctly? Could you help me with that? Thank you and best regards, Borut.

[dooklink]

I would say it is possible. Most of the settings are setup for RGBS input only. This is also the case with the original firmware. You have to cycle to RGBS, RGBHV or YPbPr inputs.

In gbs-control v3 I added a test/demo of down scaling. the setting file 'RGBHV_320x240@60Hz_RGBHV_640x480p60Hz.set' is designed for 640x480@60Hz input with RGBHV. You could start by looking at how that differs. The input ADC PLL setup registers are ones I find the most difficult.

Have you had a look at the programming guide for the 5725 chip?

[zackff7]

@dooklink how can i find the parameter name in programming guide by line number in '.set' file? There is a Registers Definition, '.set' file have 1537 lines.

Thank you!

[dooklink]

It is pretty basic. Each line is the value of a register over the entire address space. Not all address are valid, and not all valid address are writable, some are read only.

There are 6 register sets 0 through 5. Address 0xF0 (Or really any from 0xF0 to 0xFF) selects the register bank. so 0x00 to 0xFF (256) x 6 = 1536 with a blank line at the end I believe.

So to find Register set 3 address 0x34 is: (3x256) + 52 +1 = line 821.

Hopefully I got that right. I might be off if I did plus 1 instead of minus 1. The line count starts from 1, but I2C address space starts from 0.

[ramapcsx2]

Thanks @dooklink ,this helps me as well. I think I've tuned the scaler very well for my display now. You really need to disable things like "coring" and "black level enhancements" and then the image is fantastic!

[dooklink]

@ramapcsx2 I thought I had most "enhancements" disabled. Maybe I missed some of the input stage ones as I have focused on the output stages. When you say you have tuned it for your display, do you mean the input settings tuned for your source or the output settings tuned for your monitor?

[ramapcsx2]

I tweaked scaling and offsets as well as vblank start and stops to maximize the viewable area on my flat screen. So this is all output tuning. The image "enhancements" that I could find are all on the input side.

These are an unsorted list of changes I found working nicely on the inputs:

i2cset -r -y 1 0x17 0xf0 0x03; i2cget -y 1 0x17 0x2a #get 0x2a from segment 3 (step enhancement)
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x3a 0x80; #brightness lowest
i2cset -r -y 1 0x17 0xf0 0x05; i2cset -r -y 1 0x17 0x09 0xc0; #RGB ADC gain slightly lower (or e0)
i2cset -r -y 1 0x17 0xf0 0x05; i2cset -r -y 1 0x17 0x0a 0xc0; #"
i2cset -r -y 1 0x17 0xf0 0x05; i2cset -r -y 1 0x17 0x0b 0xc0; #"

i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x2a 0xdd; #"dc" > BLE normal "dd" > BLE bypass
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x29 0x07; #reduce BLE gain
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x56 0x8b; #WLE bypass
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x2b 0x0f; #step enhancement (bit 7 high for "bypass" that looks bad)
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x31 0x3a; #disable skin tone correction
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x43 0x0f; #some filters 0x0f (0x00 default)
#i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x3a 0x00; #brightness +-0 (offset = 0)
#i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x35 0x79; #contrast adjust
i2cset -r -y 1 0x17 0xf0 0x05; i2cset -r -y 1 0x17 0x03 0xf1; #adc 40mhz (default) 0xc1 150mhz

i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x24 0x60; #delays and filters optimal (already default)
i2cset -r -y 1 0x17 0xf0 0x02; i2cset -r -y 1 0x17 0x35 0x10; #bypass motion deinterlacer
i2cset -r -y 1 0x17 0xf0 0x01; i2cset -r -y 1 0x17 0x02 0x6C; #default: 0x64 
i2cset -r -y 1 0x17 0xf0 0x00; i2cset -r -y 1 0x17 0x4a 0x00; #oscillator control outputs off

#sharpness controls via 2d peaking gain
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x44 0xf8; #coring 0
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x46 0xf8; #coring 0
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x48 0xf8; #coring 0
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x45 0x1f; #horizontal band pass (max = 0x3f)
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x47 0x1a; #horizontal hi pass (max = 0x3f)
i2cset -r -y 1 0x17 0xf0 0x03; i2cset -r -y 1 0x17 0x49 0x1f; #horizontal lo pass (max = 0x3f)

i2cset -r -y 1 0x17 0xf0 0x00; i2cset -r -y 1 0x17 0x40 0x2c #memory clock to FBCLK
i2cset -r -y 1 0x17 0xf0 0x00; i2cset -r -y 1 0x17 0x46 0x00
i2cset -r -y 1 0x17 0xf0 0x00; i2cset -r -y 1 0x17 0x47 0x00

[ramapcsx2]

You can best test these settings with a console running the 240p test suite. The gray ramp picture is good to see if Black Level Expansion or Coring are on :)

Oh, and any "sharpness" controls in the scaler are contrast enhancement based. So the only good setting is 0 for them. Anything else produces ghosting and artifacts on edges.

[zackff7]

@ramapcsx2 can i modify the sharpness with these settings (like original firmware)?

[ramapcsx2]

"9.4.1 2D Peaking Especially with decoded composite signals and notch filter luminance/color separation, as input signals, It is necessary to improve the luminance/color frequency characteristics, 5725 2D peaking process is edge enhancement used to improve the Y and C sharpness for vertical and horizontal direction"

I believe this is the sharpness setting in the original firmware, yes. (Sigh, "necessary to improve the ... characteristics", as if the source material was some degraded VHS from the 80s. Why does every video chip come with this stuff? :/ )

[zackff7]

@ramapcsx2 please explain to me the line i2cset -r -y 1 0x17 0xf0 0x05; i2cset -r -y 1 0x17 0x03 0xf1; #adc 40mhz (default) 0xc1 150mhz

You set the value 0xf1 for REG S5_03, R/W

5-4 ADC_FLTR When = 00, 150MHz When = 01, 110MHz When = 10, 70MHz When = 11, 40MHz

How can i set the bit 0, 1, or 5-4? Can you show me?

Thank you!

[zackff7]

@ramapcsx2 i run you tweeks, thank you, it solved all of my problems, thank you!

[ramapcsx2]

You're welcome. This scaler is actually really good with proper settings, isn't it :)

[zackff7]

@ramapcsx2 Very good, but i don't understand, value 0xc1 for 40mhz and 0xf1 for 150mhz

Please explain to me how this values works,

5-4 ADC_FLTR When = 00, 150MHz When = 01, 110MHz When = 10, 70MHz When = 11, 40MHz

0xc1 for 40mhz 0xd1 for 70 0xe1 for 110 0xf1 for 150?

0 ADC_POWDZ When = 0, ADC in power down mode When = 1, ADC work normally

If i want to set value 1 for ADC_POWDZ, what i have to do? i2cset -r -y 1 0x17 0xf0 0x05; i2cset -r -y 1 0x17 0x03 0x??;

Thank you!

[zackff7]

After one hour thinking and reading, i decide to convert the hex value F1 to binary, now i have the answer.

Bit 01234567 11110001

Please, correct me if i'm wrong.

[ramapcsx2]

Sorry, I don't remember how this was configured but yea, you're right when you think of this in binary. You're toggling individual bits in the configuration registers after all.

[dooklink]

Close, but backwards.

The most significant digit is the left most, thus:

Bit: 7654 3210 Bin:1111 0001 Hex: f 1

Splitting the 8-bit "byte" into a "high nibble" and "low nibble" lets you convert to hex in visually simpler manner. Look at the register guide, page 209 for REG S5_03: https://drive.google.com/file/d/0B9y2RH4Lb3MZMkllYzNDR3lDdUU/view

so: 0xc1 = 150 MHz 0xd1 = 110 MHz 0xe1 =70 MHz 0xf1 = 40 MHz

[ramapcsx2]

I don't remember what the effect of the ADC clock even was. But since it's there, I probably had some sort of quality change at different clocks..

[dooklink]

I believe that setting is the ADC filter, not the clock. The filter may reduce aliasing depending on the sampling rate.

The ADC clock is reconstructed from the Hsync frequency. The settings are quite complicated and hard to get exact as every console is likely to have a different pixel clock to try and match.

[ramapcsx2]

Ah okay, makes sense. So the frequency is probably the low pass point of the filter, so the lower it is, the stronger the filtering.

I thought about making the scaler a bit smarter by constantly watching the status and reacting to it appropriately. One thing I want to try is monitoring the ADC input (voltage) levels and then auto adjusting the gain so that the scaler produces 0 to 100% brightness on all colors and across different consoles. Do you think this is possible? :)