Test failure _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UShort()

[v-wenyuxu]

Failed in: runtime-coreclr gcstress-extra 20231007.1

Failed tests:

coreclr windows arm64 Checked gcstress0xc_jitstress2 @ Windows.11.Arm64.Open
    - _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UShort()
    - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UInt32()
coreclr windows arm64 Checked gcstress0xc_zapdisable_jitstress2 @ Windows.11.Arm64.Open
    - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x4UInt64()
    - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UInt64()
coreclr windows arm64 Checked gcstress0xc_tailcallstress @ Windows.11.Arm64.Open
    - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x4UInt32()
    - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3Int64()
coreclr linux arm64 Checked gcstress0xc_tailcallstress @ (Ubuntu.1804.Arm64.Open)Ubuntu.1804.Armarch.Open@mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-18.04-helix-arm64v8
    - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3SByte()
    - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3Int64()
coreclr windows arm64 Checked gcstress0xc_jitstress1 @ Windows.11.Arm64.Open
    - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x4UShort()
coreclr linux arm64 Checked gcstress0xc_jitstress1 @ (Ubuntu.1804.Arm64.Open)Ubuntu.1804.Armarch.Open@mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-18.04-helix-arm64v8
    - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x2Float()
coreclr linux arm64 Checked gcstress0xc_jitstress2 @ (Ubuntu.1804.Arm64.Open)Ubuntu.1804.Armarch.Open@mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-18.04-helix-arm64v8
    - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3Int32()

Error message:

One or more scenarios did not complete as expected.

Stack trace:

at JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UShort() in /__w/1/s/artifacts/tests/coreclr/obj/AnyOS.x64.Checked/Managed/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_ro/AdvSimd.Arm64_ro/gen/LoadVector128x3UShort.cs:line 52
at Program.<<Main>$>g__TestExecutor327|0_328(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&)

[ghost]

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Issue Details

---

**Failed in:** [runtime-coreclr gcstress-extra 20231007.1](https://dev.azure.com/dnceng-public/public/_build/results?buildId=430971&view=ms.vss-test-web.build-test-results-tab&runId=9529772&resultId=120779&paneView=debug) **Failed tests:** ``` coreclr windows arm64 Checked gcstress0xc_jitstress2 @ Windows.11.Arm64.Open - _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UShort() - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UInt32() coreclr windows arm64 Checked gcstress0xc_zapdisable_jitstress2 @ Windows.11.Arm64.Open - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x4UInt64() - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UInt64() coreclr windows arm64 Checked gcstress0xc_tailcallstress @ Windows.11.Arm64.Open - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x4UInt32() - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3Int64() coreclr linux arm64 Checked gcstress0xc_tailcallstress @ (Ubuntu.1804.Arm64.Open)Ubuntu.1804.Armarch.Open@mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-18.04-helix-arm64v8 - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3SByte() - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3Int64() coreclr windows arm64 Checked gcstress0xc_jitstress1 @ Windows.11.Arm64.Open - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x4UShort() coreclr linux arm64 Checked gcstress0xc_jitstress1 @ (Ubuntu.1804.Arm64.Open)Ubuntu.1804.Armarch.Open@mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-18.04-helix-arm64v8 - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x2Float() coreclr linux arm64 Checked gcstress0xc_jitstress2 @ (Ubuntu.1804.Arm64.Open)Ubuntu.1804.Armarch.Open@mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-18.04-helix-arm64v8 - _AdvSimd_Arm64_r::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3Int32() ``` **Error message:** ``` One or more scenarios did not complete as expected. ``` **Stack trace:** ``` at JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UShort() in /__w/1/s/artifacts/tests/coreclr/obj/AnyOS.x64.Checked/Managed/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_ro/AdvSimd.Arm64_ro/gen/LoadVector128x3UShort.cs:line 52 at Program.<

$>g__TestExecutor327|0_328(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&) ```

Author:	v-wenyuxu
Assignees:	-
Labels:	`arch-arm64`, `os-linux`, `os-windows`, `GCStress`, `area-CodeGen-coreclr`, `untriaged`
Milestone:	-

[BruceForstall]

e.g.,

23:20:03.798 Running test: _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UShort()
Beginning scenario: RunBasicScenario
Beginning scenario: RunReflectionScenario
Beginning scenario: RunClassFldScenario
Arm64.LoadVector128x3<Int32>(Vector128<UInt16>): LoadVector128x3 failed:
 input: (48798, 48900, 48549, 27584, 4749, 35097, 3132, 15392, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)
 result1: (48798, 27584, 3132, 0, 0, 0, 0, 0)
 result2: (48900, 4749, 15392, 0, 0, 0, 0, 0)
 result3: (48549, 35097, 0, 0, 0, 0, 1, 0)

Beginning scenario: RunStructLclFldScenario
Beginning scenario: RunStructFldScenario
Arm64.LoadVector128x3<Int32>(Vector128<UInt16>): LoadVector128x3 failed:
 input: (48798, 48900, 48549, 27584, 4749, 35097, 3132, 15392, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)
 result1: (48798, 27584, 3132, 0, 0, 0, 0, 0)
 result2: (48900, 4749, 15392, 0, 0, 0, 0, 0)
 result3: (48549, 35097, 0, 0, 0, 0, 1, 0)

System.Exception: One or more scenarios did not complete as expected.
   at JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UShort() in /__w/1/s/artifacts/tests/coreclr/obj/AnyOS.x64.Checked/Managed/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_ro/AdvSimd.Arm64_ro/gen/LoadVector128x3UShort.cs:line 52
   at Program.<<Main>$>g__TestExecutor327|0_328(StreamWriter tempLogSw, StreamWriter statsCsvSw, <>c__DisplayClass0_0&)
23:20:09.107 Failed test: _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.LoadVector128x3UShort()

[kunalspathak]

Duplicate of https://github.com/dotnet/runtime/issues/93230