douggilliland / R32V2020

My 32-bit RISC CPU for smallish FPGAs
GNU General Public License v3.0
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Opcode changes documented in this thread #29

Closed douggilliland closed 5 years ago

douggilliland commented 5 years ago

For some reason HCF with opcode encoded as 0x00 is happening at the start so I can't use 0x00 as HCF. Swapping opcodes for HCF and NOP since NOP has no effect and it's therefore OK to do one at the start.

douggilliland commented 5 years ago

That change made HCF work I see 01 (opcode), but 00 (address) for some reason.

I think it may be because the pipeline is cleared by reset so there's an inherent 0x00 opcode in the pipeline when starting up.

Problem turned out to be the first instruction was not being pre-fetched coming out of reset. Fixed.

Just thought I fixed it. Think I may have really fixed it now.

douggilliland commented 5 years ago

Added other branch BEZ and BE1 opcodes to the opcode tables.

douggilliland commented 5 years ago

Added BNE (Branch Not Equal). Tested with C012-ENS_Test.asm and it works. Also implements ENS (ENdian Swap) opcode. (Also tested with negative BNE case via several typos in the code) until this:

; ENS Test
start:
00000000    41801234        liu r8,0x1234
00000001    40805678        lil r8,0x5678
00000002    38808000        ens r8,r8
00000003    20A80000        ads r10,r8,r0   ; do just to see it on the ALU output
00000004    41907856        liu r9,0x7856
00000005    40903412        lil r9,0x3412
00000006    20B90000        ads r11,r9,r0   ; do just to see it on the ALU output
00000007    22389000        cmp r8,r9
00000008    C8000002        bne flagFail
00000009    C0FFFFF7        bra start
flagFail:
0000000a    01000000        hcf

C012-ENS_Test_SignalTap

C012-ENS_-ShowingSwap_Test_SignalTap

douggilliland commented 5 years ago

There is no need for a conventional MOVe instruction. That is because MOVe can be done with an ADS instruction. To move a register to another register, do:

ADS rD,r0,rS ; Moves rS to rD