Open S1L3NTANG3L opened 1 year ago
Nevermind just had to update pip XD
Okay nevermind there's something wrong the nano is sending data but the pi isn't recieving it
Your diagram shows the chip enable pin going to A0? I'm using a Keywish NANO + NRF24L01 so my pins are layed out a bit differently (D9 => CSN, D10 => CE, D11 => MOSI, D12 => MISO, D13 => SCK) but I updated your ino to account for that so I'm not too sure what the issue might be.
CONFIG: (0x0f) => RX_DR IRQ, TX_DS IRQ, MAX_RT IRQ, CRC on, CRC 2 byte, Power up , RX EN_AA: (0x3f) => P0:ACK P1:ACK P2:ACK P3:ACK P4:ACK P5:ACK EN_RXADDR: (0x07) => P0:on P1:on P2:on P3:off P4:off P5:off SETUP_AW: (0x03) => address width bytes 5 SETUP_RETR: (0x1f) => retry delay 500 us, retries 15 RF_CH: (0x64) => channel=100 RF_SETUP: (0x21) => no continuous carrier, no force PLL lock, 250 kbps, -18 dBm STATUS: (0x0e) => no RX data, no TX, TX retries ok, no pipe data, TX FIFO not fu ll OBSERVE_TX: (0x00) => lost packets 0, retries 0 RPD: (0x00) => received power detector 0 RX ADDR_PX: P0=0xe7e7e7e7e7 P1=0x4f53574930 P2=0x31 P3=0xc4 P4=0xc5 P5=0xc6 TX_ADDR: 0xe7e7e7e7e7 RX_PW_PX: P0=00 P1=00 P2=00 P3=00 P4=00 P5=00 FIFO_STATUS: (0x11) => TX reuse not set, TX FIFO empty, RX FIFO empty DYNPD: (0x06) => P0:off P1:on P2:on P3:off P4:off P5:off FEATURE: (0x04) => Dynamic payload on, ACK payload off, W_TX_PAYLOAD_NOACK off
Hi I'm having some issues running your code, I can't seem to find the nrf library you import if you can maybe send me a link to it. Regards