Layout optimizations happen at the wrong time

[ccasin]

The current implementation eliminates fall-through jumps at the BIR level. This creates some problems because the control flow in the block list is no longer explicit. This is a layout optimization, and should be done later on assembly (or VIR?) instead.

We can put this in the patcher, or as a peephole optimization, or rely on OFRAK (if it can do this). Some care should be taken to do it in an architecture-agnostic way, to the extent possible.

[bmourad01]

This is now done during the peephole optimizations at the VIR level, after register allocation and scheduling.