Open piranna opened 7 years ago
I have review the code and the only output values are the decoded data and the length of the number of used bytes. I think the length can be moved out so there only be one input and one output, ideal for a function. To notify there are more bits on the stream, we could add a single most valued byte to notify that there are more data to be decoded.
How do you feel about changing the API from module-based using several inputs for each one of the bytes, to function-based using a single big array of bits?
Seems it's possible to have parametrized functions.
@piranna modules is the most common idiom in Verilog. Functions has no much benefits, only limitations. I would stick with modules.
My point was not about replace the module by some functions, but instead to allow both idioms. I'm currently using a global module that calculate the value in all the cases, but I need an extra one for a single case and seems a bit overkill...
@piranna writing / generating Verilog is my prime job for last 20 years. Trust me: multiple nested modules is the common idiom. It seems like function is a lightweight replacement for module, but functions have too many limitations for any sizable job and your final target (gate / LUT count) does not depend on function / module choice.
Add Verilog functions to allow to do the conversion on the fly, not needing to create a decoder component. This could be done reusing the internal structures, and also the component would allow that function itself. Only drawback would be that functions only can output a single value, so there would not be any way to notify errors, maybe only adding extra bits on the output result.