The debug logic in some CPU architectures allows to configure how data is read from a memory bus.
In some corner cases, this physical access size may have an impact on the success of reading memory. On the contrary a debugger may want to read as much data as possible with a single operation. Finding a good balance isn't always easy, and a user from time to time may want/need to have a more fine granular configuration to override the default strategy of a debugger. For example if they want to test the target system and that the memories are wired in correctly.
To enable such use cases, we should offer an expert setting to let the user specify this for individual memory window instances.
Additional information
This has a strong dependency on potential Microsoft DAP protocol enhancements or customizations.
Description
The debug logic in some CPU architectures allows to configure how data is read from a memory bus. In some corner cases, this physical access size may have an impact on the success of reading memory. On the contrary a debugger may want to read as much data as possible with a single operation. Finding a good balance isn't always easy, and a user from time to time may want/need to have a more fine granular configuration to override the default strategy of a debugger. For example if they want to test the target system and that the memories are wired in correctly.
To enable such use cases, we should offer an expert setting to let the user specify this for individual memory window instances.
Additional information
This has a strong dependency on potential Microsoft DAP protocol enhancements or customizations.