Open cncherisher opened 6 months ago
The best approach is to convert the ThreadX RISC-V 32-bit support with IAR to GCC, which amounts to changing the assembly code (tx*.s), tx_port.h, and linker control file (first available memory address). This is easier than creating a new port from scratch, but still a good amount of work.
Is this request related to a particular hardware platform, SoC, board? Please describe. Hello
Is threadX supported on Xilinx Microblaze soft processor which use RISC-V 32 bit? I see there is support for RISC-V 32bit for IAR toolchain and RISC-V 64bit for GCC toolchain, but Vitis IDE use GCC toolchain, so is there any listed steps to port risc-v32 for GCC toolchain?