GRA for vector registers on 32bit x86 is broken. It attempts to use an ST real register to hold a value from a 128 bit TR_VRF virtual register. The generated instructions actually expect xmm real registers to be assigned to TR_VRF virtual registers. Assigning incompatible registers to an instruction ends up confusing binary encoding leading to incorrect code generation.
This problem is specific to 32bit x86. On 64bit, GRA assigns xmm registers as expected.
2036 Disables vector register GRA on 32bit x86. It also disables autosimd reduction operations on 32bit x86. These features will need to be reenabled after the GRA problem in this issue has been resolved.
IBMJimmyk
commented
6 years ago
GRA for vector registers on 32bit x86 is broken. It attempts to use an ST real register to hold a value from a 128 bit TR_VRF virtual register. The generated instructions actually expect xmm real registers to be assigned to TR_VRF virtual registers. Assigning incompatible registers to an instruction ends up confusing binary encoding leading to incorrect code generation.
This problem is specific to 32bit x86. On 64bit, GRA assigns xmm registers as expected.