Print real register names in trace file on AArch64

[knn-k]

TR_Debug::getName(TR::RealRegister *reg, TR_RegisterSizes size) in ARM64Debug.cpp can return the real register names depending on the size parameter. However, functions in ARM64Debug.cpp always pass TR_WordReg as the register size regardless of the opcode kind as shown below.

Example:

TR_Debug::print(TR::FILE *pOutFile, TR::ARM64Trg1Instruction *instr)
   {
   printPrefix(pOutFile, instr);
   trfprintf(pOutFile, "%s \t", getOpCodeName(&instr->getOpCode()));
   print(pOutFile, instr->getTargetRegister(), TR_WordReg);
   trfflush(_comp->getOutFile());
   }

[o3hjj]

Based on @0xdaryl comments in #4850 I believe I have a solution. Currently the mnemonics for an opcode indicate what size of register is being used. For example the compare and branch zero instruction is represented by the cbz mnemonic for 32-bit and the cbzx mnemonic for 64-bit. I propose querying the current instruction's opcode mnemonic to determine the size of the register when printing out the traceCG log. These changes will only affect ARM64Debug.cpp. Is this an acceptable solution or should I investigate the other suggestion of storing the registers size?

[knn-k]

I think that works for most cases. However, there are some instructions that take operands of mixed register types, such as fmov_dtox and scvtf_wtos. Decoding register types from the mnemonics of load/store instructions is not trivial, either.

@0xdaryl What do you think?