Here is the meta-intel-edison that builds, tries to stay up to date. Master is based on Yocto Poky Gatesgarth LTS 5.10.yy vanilla kernels. It builds a 32bit kernel (Gatesgarth branch 64bit) with ACPI enabled and corresponding rootfs. Telegram group: https://t.me/IntelEdison Web-site:
I don't want to pull this now. This is a branch for @plbossart to enable testing SOF on edison in response to the comment in PR #112
I tested this myself, but on top of my btrfs branch, running from the sdhc. That should not make a significant difference to building this and flashing it to emmc. I see the clock 2.40MHz and bytes arriving ~48kHz on TX. I did not check clock polarity or if the signals can actually drive a sound card.
The only strange thing is that the i2s signals are not visible until you do:
I don't want to pull this now. This is a branch for @plbossart to enable testing SOF on edison in response to the comment in PR #112
I tested this myself, but on top of my btrfs branch, running from the sdhc. That should not make a significant difference to building this and flashing it to emmc. I see the clock 2.40MHz and bytes arriving ~48kHz on TX. I did not check clock polarity or if the signals can actually drive a sound card.
The only strange thing is that the i2s signals are not visible until you do:
But we already do this directly after loading the arduino.aml table (here. Maybe sleep 0.1 is too short for the SOF to initialize?