The issue happened when the power on reset PoR signal deasserted within the time window of the hold or setup violations. That causes X's to progress all over the design and that doesn't get fixed after the 3 stage reset synchronizer fixes the reset. More likely this is a simulator problem as the synchronizer eventually fixes the value but the simulator isn't sensitive to edge transition x to 1.
The issue happened when the power on reset
PoR
signal deasserted within the time window of the hold or setup violations. That causes X's to progress all over the design and that doesn't get fixed after the 3 stage reset synchronizer fixes the reset. More likely this is a simulator problem as the synchronizer eventually fixes the value but the simulator isn't sensitive to edge transition x to 1.