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efabless / caravel-gf180mcu

This repository is the GF180MCU port of Caravel. For more information about Caravel, see the original repo at https://github.com/efabless/caravel.
Apache License 2.0
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SRAM 512 not DRC clean #70

Closed marwaneltoukhy closed 1 year ago

marwaneltoukhy commented 1 year ago

Expected Behavior

sram512x8m8wm1 DRC clean

Actual Behavior

sram512x8m8wm1 has a violation in rule NW.2b_5V_

Steps to Reproduce the Problem

  1. build the pdk
  2. run python3 run_drc.py --gf180mcu=C --path=$PDK_ROOT/$PDK/libs.ref/gf180mcu_fd_ip_sram/gds/gf180mcu_fd_ip_sram__sram512x8m8wm1.gds

Specifications

Original issue filed here https://github.com/efabless/globalfoundries-pdk-libs-gf180mcu_fd_pr/issues/7

RTimothyEdwards commented 1 year ago

As noted in the conference call, this issue is with the klayout DRC deck implementation, as the nwells in question are at the same potential. The "different potential" nwell spacing rule does not apply, and so there is no real DRC error here.

marwaneltoukhy commented 1 year ago

SRAM DRC is clean when enabling connectivity.