GPIO low chain pull up and high chain output error on silicon

efabless / caravel

Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.

https://caravel-harness.readthedocs.io/

Apache License 2.0

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Open marwaneltoukhy opened 5 months ago

marwaneltoukhy commented 5 months ago

The test for GPIO low chain pull up and high chain output has an error on silicon at 0C temperature