85C temperature failure on silicon

efabless / caravel

Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.

https://caravel-harness.readthedocs.io/

Apache License 2.0

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Open marwaneltoukhy opened 10 months ago

marwaneltoukhy commented 10 months ago

At some point in the middle of the regression on 85C, the UART fails, making the tests fail.