search

efabless / caravel_board

32 stars 41 forks source link

Update caravel v5 #102

Closed passant5 closed 8 months ago

passant5 commented 8 months ago
  1. Remove PoR U4
  2. Pull down ~UART_EN to enable the UART mode by default and in SPI mode, the FTDI should drive ~UART_EN high
  3. Breakout as many of the unused GPIOs on the FTDI
  4. Reorder J10 to have the IOs[37-14] consecutive
  5. Add a 10uF bulk cap near the FTDI chip
  6. Use lower ESR caps for the decoupling caps
  7. Update Flash VCC pin decoupling caps to 1, 0.1, and 0.01 uF
  8. Add USB 5V filter
  9. Use knock-out silkscreen for readability