Added an ifdef for USE_POWER_PINS around the power pins of the SRAM in RTL verilog

[RTimothyEdwards]

Added an ifdef for USE_POWER_PINS around the power pins of the SRAM module in the RTL verilog file mgmt_core.v to match the verilog of the SRAM module itself. As far as I am aware, the VexRISC core does not need the same treatment because the VexRISC core does not define power supply pins at all. Note that this is a change to an automatically-generated file, and the change needs to be made elsewhere in the LiteX code to become permanent.

[RTimothyEdwards]

This PR should have been marked with the branch caravel_stanford as target. It has already been merged into that branch, so this pull request can be closed (the permanent fix is in the LiteX code, not a quick fix to the RTL verilog, so this will not be merged into branch main).