Switching from cpu=vexriscv to cpu=picorv32 causes the following issue while building:
Resource not found: serial:None
Trace:
Traceback (most recent call last):
File "(Redacted)/caravel_mgmt_soc_litex/litex/caravel.py", line 334, in <module>
main()
File "(Redacted)/caravel_mgmt_soc_litex/litex/caravel.py", line 321, in main
soc = MGMTSoC()
File "/(Redacted)/caravel_mgmt_soc_litex/litex/caravel.py", line 219, in __init__
uart_ports = platform.request("serial")
File "/home/(Redacted)/.local/lib/python3.10/site-packages/litex/build/generic_platform.py", line 342, in request
return self.constraint_manager.request(*args, **kwargs)
File "/home/(Redacted)/.local/lib/python3.10/site-packages/litex/build/generic_platform.py", line 209, in request
resource = _lookup(self.available, name, number, loose)
File "/home/(Redacted)/.local/lib/python3.10/site-packages/litex/build/generic_platform.py", line 99, in _lookup
raise ConstraintError("Resource not found: {}:{}".format(name, number))
litex.build.generic_platform.ConstraintError: Resource not found: serial:None
make: *** [Makefile:20: mgmt_soc] Error 1
Switching from cpu=vexriscv to cpu=picorv32 causes the following issue while building:
Resource not found: serial:None
Trace: