port test bench for memory

[jeffdi]

(venv) jeffs-mbp:mem jeffdi$ make clean all
rm -f *.elf *.hex *.bin *.vvp *.vcd *.log
/usr/local/bin/riscv64-unknown-elf-gcc -O0 -I ../ -I ../generated -march=rv32i -mabi=ilp32 -Wl,-Bstatic,-T,../sections.lds,--strip-debug -ffreestanding -nostdlib -mstrict-align -mno-save-restore -D__picorv32__ -o mem.elf ../start.S ../isr.c mem.c
/usr/local/Cellar/riscv-gnu-toolchain/master/lib/gcc/riscv64-unknown-elf/9.2.0/../../../../riscv64-unknown-elf/bin/ld:../sections.lds:23: warning: memory region `main_ram' not declared
/usr/local/bin/riscv64-unknown-elf-objcopy -O verilog mem.elf mem.hex 
# to fix flash base address
#sed -i 's/@10000000/@00000000/g' mem.hex
iverilog -Ttyp -DFUNCTIONAL -DSIM -DEF_STYLE -I ../ \
-I /sky130A -I ../../rtl \
-o mem.vvp mem_tb.v
../../rtl/mgmt_core_wrapper.v:236: warning: parameter USE_LATCH not found in mem_tb.uut.DFFRAM.
../../rtl/mgmt_core_wrapper.v:235: warning: parameter WSIZE not found in mem_tb.uut.DFFRAM.
../../rtl/mgmt_core.v:8104: warning: Port 21 (pcpi_rd) of picorv32 expects 32 bits, got 1.
../../rtl/mgmt_core.v:8104:        : Padding 31 high bits of the port.
vvp mem.vvp
Reading mem.hex
mem.hex loaded into memory
Memory 5 bytes = 0x6f 0x00 0x80 0x19 0x00
VCD info: dumpfile mem.vcd opened for output.
Mem Test (word rw) started
Monitor: Test MEM (RTL) [word rw]  passed
Mem Test (short rw) started
Monitor: Test MEM (RTL) [short rw]  passed
Mem Test (byte rw) started
Monitor: Test MEM (RTL) [byte rw] passed
/usr/local/bin/riscv64-unknown-elf-objdump -D mem.elf > mem.lst
rm mem.elf mem.vvp

[jeffdi]

Done