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caravel_user_sram
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Make this repo more complete and tapeout-ready
#5
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amm-efabless
opened
1 month ago
amm-efabless
commented
1 month ago
Update
verilog/includes/*
Put in at least one SRAM test
Make sure simulation/test/timing can be run, and document how to do that
Make sure it passes (private) precheck
verilog/includes/*