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efabless / globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0

7 track standard cells for GF180MCU provided by GlobalFoundries.
https://gf180mcu-pdk.rtfd.io
Apache License 2.0
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All metal layers in the tech lef `gf180mcu_5LM_1TM_9K_7t_tech.lef` have the same `CPERSQDIST` #5

Open passant5 opened 1 year ago

passant5 commented 1 year ago

The CPERSQDIST value is 0.0000394 for all metals. As well, the value seems to be too low. When compared with the capacitance extracted using extraction tools, the value seems to be off by 10x For example: a wire on metal 3 for 1171um with a minimum width of 0.28um, results in an estimated capacitance of 0.0129pF. The same wire has a capacitance of 0.126pF in the parasitics extraction file.

This value is used to estimate the capacitance of the interconnects during PnR flow optimizations

mo-hosni commented 1 year ago

The timing optimization was improved for caravel-gf180 after changing the CPERSQDIST to the following values for Metal1, Metal2, Metal3, Metal4, and Metal5 respectively:

0.0004
0.0003
0.00028
0.000277
0.000174

As mentioned in this PR

jeffdi commented 1 year ago

need values for min and max to close - do we have the raphael data for the other corners? @shalan