How to run the iverilog simulation without the voltage regulator ?

[sofchet]

Hi, I am trying to run the iverilog simulation of the Raven-picorv32, however, as mentioned in your verilog code, iverilog does not support the aregc01_3v3 regulator module. What would be the best way to run the simulation without the regulator ?

Knowing that I am not interested in any analog part simulation, I need just an easy way to make sure that the SoC part is correctly working with the GPIOs.

I tried commenting the voltage regulator part and running the GPIO simulation, however, the GPIO states are not being reported correctly by the C program.

Many thanks

[RTimothyEdwards]

iverilog does not support verilog-A or verilog-AMS. However, the versions of the analog blocks that are in this repository are compatible with iverilog. They use real-valued I/O for representing the power supplies, so it is possible to not only simulate, but also to check that the power supplies are correct in both the 1.8 and 3.3V domains.

[sofchet]

@RTimothyEdwards Many thanks for your answer.

Actually when I try to run the make file for the raven_gpio simulation I get the following:

Which is related to the voltage regulator I told you about. It is actually mentioned in line 1603 in the raven.v file that there is some issue with the iverilog not supporting the voltage regulator module.

Then when I comment the module and run the simulation I don't get the right GPIO output:

Can you please tell what would be the best way to run your tests, with the fewest edits possible ?

thanks,

[RTimothyEdwards]

Ah, it does look like raven.v is missing one important correction. iverilog will not connect two real valued outputs, so having two voltage regulators with the output tied to the same net won't work. The (hack) workaround that I used was to remove the array identifier [1:0] from the voltage regulator (see raven.v line 1602). For purposes of getting correct LVS, I instantiated the voltage regulator twice and put one of them inside an `ifdef LVS ... `endif block so that it was not seen by the simulator.

Of course, any time that something is hidden from the simulator is a possible place to introduce an error that isn't seen in simulation. For the moment, I don't have a better workaround, though.

---Tim

[sofchet]

okay many thanks ! it worked