eirikpre / VSCode-SystemVerilog

SystemVerilog support in VS Code
MIT License
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A bug about code folding of macro definition #65

Closed roccomao closed 3 years ago

roccomao commented 5 years ago

I found this bug when the code contained a lot of precompiled macros. If only `ifdef, `endif is included, the code folding is correct. As shown below :

folding 1

When `elsif, `else appears, only the last code block will be folded. As shown below :

folding 2

I found the code that controls the code folding in language-configuration.json as shown below, but it doesn't seem to work, so I proposed this issue. Is there any way to solve it?

{
    "folding": {
        "offSide": false,
        "markers": {
            "start": "^\\s*`(ifdef|ifndef|elsif|else)|(\/\/#region)",
            "end": "^\\s*`(elsif|else|endif)|(\/\/#endregion)"
        },
    }
}
eirikpre commented 5 years ago

Heya, sorry for a late response.

Yeah I noticed the same, but had no immediate ideas.

I think it's not willing to match the same line twice, I tried a few changes but no solution.

I think the only solution is to implement one of these FoldingRangeProvider, which requires a bit more time.

Keeping the task open, but this has little priority. I suggest using indentation when using those, and it will grasp folding markers from that.