Closed augustofg closed 5 months ago
Thanks for reporting! I am a bit busy at the time, but I will try to investigate over the next couple of weeks.
Could you tell me more about which simulator is produced this file? Looks like a variable is declared as a 1-bit value, but then gets a string false
as value change.
I will try to see how I can get this to work.
Hi Kevin,
This file was generated with NVC from what I remember. I can try with GHDL to see how it will behave.
Augusto.
On June 11, 2024 5:26:47 PM GMT-03:00, Kevin Laeufer @.***> wrote:
Could you tell me more about which simulator is produced this file? Looks like a variable is declared as a 1-bit value, but then gets a string
false
as value change.I will try to see how I can get this to work.
-- Reply to this email directly or view it on GitHub: https://github.com/ekiwi/wellen/issues/16#issuecomment-2161551804 You are receiving this because you authored the thread.
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Thanks for the info. Yes, I would be curious to see what GHDL produces.
Indeed, GHDL seems to produce a FST file that can be opened with surfer with no problems. I've attached both FST files and the VHDL source used to generate those.
Strangely, gtkwave can open and visualise the NVC generated FST, but have problems with the GHDL FST.
vhdl_test_bool_nvc.fst.gz vhdl_test_bool_ghdl.fst.gz vhdl_test_bool.tar.gz
I added a small workaround in the latest wellen release (0.9.11). It won't look super pretty, since it will essentially turn boolean signals into a 1-bit bit-vector signal, but its something that could be done without completely refactoring wellen. nvc could always switch to do "the right thing", i.e. encode booleans as a FST enum.
I'm a bit confused by this because NVC should emit booleans identically to other enums except with FST_SDT_VHDL_BOOLEAN
instead of FST_SDT_NONE
.
I'm a bit confused by this because NVC should emit booleans identically to other enums except with
FST_SDT_VHDL_BOOLEAN
instead ofFST_SDT_NONE
.
OK. Then I will try to have a closer look at what is going on.
@nickg can you point me to the code in nvc that generates the hierarchy entry for boolean variables?
https://github.com/nickg/nvc/blob/f2118b2d189bb50392f9d65b8ca57cd07f085708/src/rt/wave.c#L327
All enums are emitted as strings at the moment (FST_VT_GEN_STRING
). I can't remember why I'm not using FST_VT_SV_ENUM
. Possibly I couldn't get it to work with GtkWave.
All enums are emitted as strings at the moment (
FST_VT_GEN_STRING
). I can't remember why I'm not usingFST_VT_SV_ENUM
. Possibly I couldn't get it to work with GtkWave.
Thanks for all the info @nickg! I think I have a better way of dealing with this issue now.
I have a much better fix now. Turns out that I the type of a variable in a VCD or FST does double duty: (1) it indicates how the signal is supposed to be encoded (string, real or bit-vector) (2) it informs the user what the type of the variable in the original HDL code was. This overloading combined with the additional VHDL type information lead to wellen
discarding the correctly declared String
encoding from nvc
. That is fixed now in the 0.9.12
release. Thanks a lot @nickg and @augustofg !
Hi Kevin,
It seems that wellen doesn't support VHDL boolean typed signals, when trying to view the
bool
signal after loading the attached file, surfer crashes:You have my permission to include the attached fst file to the regression test suit.
Thanks for the great work you are doing. Augusto.
vhdl_test_bool.fst.zip